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   MPW Schedule 2012 & 2013 and Price Information 2012


General Technology Description

 

SG25 is the basic 0.25 µm CMOS process. It provides Nmos, Pmos, isolated Nmos and passive components such as poly resistors and MIM capacitors. In addition to the basic CMOS process 3 frontend options and 2 aluminum backend options are offered.

 

The standard backend option offers 3 thin metal layers and two TopMetal layers (Top-Metal1 - fourth 2 µm thick metal layer, TopMetal2 – fifth 3 µm thick metal layer) and a MIM layer. Together with a high dielectric stack this enables increased RF passive com-

ponent performance.

 

SG25H1 technology is a high performance BiCMOS technology. The bipolar module H1 is based on SiGe:C npn-HBTs with up to 190GHz transient frequencies and up to 220GHz oscillation frequencies.

 

SG25H3 technology is a BiCMOS technology, too. The bipolar module H3 based on SiGe:C npn-HBT with up to 110 GHz transient frequencies and up to 180 GHz oscillation frequencies. Additionally, SiGe:C npn-HBTs with breakdown voltages (BVCE0) up to 7 V are offered.

 

SG25H3P technology is a high-performance complementary BiCMOS technology. In addition to the bipolar module from SG25H3 a high-performance SiGe:C pnp-HBT with up to 90 GHz transient frequencies and 120 GHz oscillation frequencies is offered.

 

SGB25V is a 21-mask BiCMOS process which combines a 0.25 µm CMOS core with 3types of SiGe:C HBTs.

 

SGB25RH is a special variant of SGB25V which includes radiation hard IP for space applications.

 

GD module (SGB25V) adds, by 3 mask steps, a complementary LDMOS module to the SGB25V process (nLDMOS up to 22 V, pLDMOS up to -16 V breakdown voltage and an isolated nLDMOS device).

 

SG13S technology has a very high bipolar performance with up to 250 GHz transient frequencies and up to 300 GHz oscillation frequencies. The process offers a 7-layer Al-BEOL, including a MIM capacitor. 5 thin metal layers are based on 130 nm design rules. Two TopMetal layers (TopMetal1 - 2 µm thick metal layer, TopMetal2 – 3 µm thick metal layer) are for high Q passives. This technology offers CMOS devices with 130 nm gate length and 1.2 V core voltage and high voltage CMOS devices with 3.3 V core voltage. Further digital IP is available.

 

SG13C technology is an RF CMOS technology which includes all features of SG13S, but no bipolar HBTs.

 

SG13G2 technology has a very high bipolar performance with up to 300 GHz transient frequencies and up to 500 GHz oscillation frequencies. The process offers a 7-layer Al-BEOL, including a MIM capacitor. 5 thin metal layer are based on 130 nm design rules. Two TopMetal layers (TopMetal1 - 2 µm thick metal layer, TopMetal2 – 3 µm thick metal layer) are for high Q passives. This technology offers CMOS devices with 130 nm gate length and 1.2 V core voltage and high voltage CMOS devices with 3.3 V core voltage.

 

RFMEMS module is an additional option in SG25H1 and SG25H3 technologies which offers integrated capacitive RFMEMS switch devices for frequencies between 30 GHz to 110 GHz.

 

LBE module (Localized Backside Etching) is offered in all technologies to remove silicon locally to improve passive performance.

 

Cu-plating is an additional module with 2 layer copper, BCB and gold-pads offered in SGB25V, SG25H1 and SG25H3.

 

BEOL (only) Backend of Line Runs are offered for testing of passive structures only. Produced are Metal1 and all layers above. These runs are offered either for 0.25 µm BEOL layer stack (SG25) or 0.13 µm layer stack (SG13). RF-MEMS switch and LBE can be ordered together with BEOL (only) runs.


2.1 MPW Price Information 2012

 

Non Commercial Access

For European non profit and educational institutions a discount of 25 % is offered via Europractice ( www.europractice-ic.com ) and there is no minimum size requirement for all runs marked with x only.

 

For European universities there is a 40% discount for SG13S and SG13G2 via Europractice program in 2012. The same is valid for project partners in public funded projects. Further costs for using LBE module in all technologies and RFMEMS module in SG25H3 and SG25H1 are reduced to 2500 € per order and technology.

 

2.1.1 Prices for technologies

 

Process

Area price / mm²

SGB25V

€ 2500

SGB25RH

€ 2600 + 10000 € per Run

SG25H1

€ 6800

SG25H3

€ 3800

SG13S

€ 7000

SG13C

€ 4500

SG13G2

€ 7500

 

2.1.2 Prices for modules

 

Module (Process)

Price

GD (SGB25V)

€ 450 (per mm²)

PNP (SG25H3)

€ 2000 (per mm²)

LBE (all)

5000 € per order and technology

RFMEMS switch (H1, H3)

10000 € per order and technology

Cu-plating

17000 € per order*

BEOL (only) 0.25µm (SG25)

€ 800 (per mm²)

BEOL (only) 0.13µm (SG13)

€ 1000 (per mm²)

* This price is valid if only one customer is using this option per MPW run. Contact IHP if reduced price is possible for a certain MPW run.

 

2.2 MPW Schedule 2012

 

2.2.1 Schedule for complete technologies

 

TAPE IN

Shipment

SGB25

SG25

SG13

 

 

V

RH

H1

H3

S (C)

G2

Dec 12, 11

20 Apr, 12

 

 

 

 

x

x

Jan 09, 12

Apr 02, 12

x

 

x1

x

 

 

Apr 16, 12

Aug 27, 12

 

 

 

 

x

 

Apr 30, 12

Jul 23, 12

x

 

x3

x

 

 

Jul 30, 12

Nov 19, 12

 

 

 

 

x

x

Sep 03, 12

Nov 27,12

x

x2

x1

x

 

 

Nov 05, 12

Feb 11, 13

x

x2

x1

 

 

 

Dec 10, 12

19 Apr, 13

 

 

 

 

x

x

 

1 Shipment 7 days later

2 Shipment 21 days later

3 Run without priority

        0.13 µm Runs

 

2.2.2 Schedule for modules

 

TAPE IN

Shipment
(standard)

GD

H3P

RF-MEMS
switch1

LBE1

Cu Plating
(with IZM)2

Jan 09, 12

May 14, 12

 

x

x

x

 

Apr 30, 12

Aug 27, 12

x

 

x

x

x

Sep 03, 12

Jan 07, 13

 

x

x

x

x

Nov 05, 12

March 11,13

x

 

x

x

x

 

1 Localized Backside Etching shipment 12 days later than standard shipment

2 Cu Plating Shipment 8 weeks after standard shipment

 

2.2.3 BEOL (only) runs

 

TAPE IN

Shipment

SG25

SG13

RF-MEMS
switch1

LBE

Cu Plating
(with IZM)

March 12

May 12

x

 

x

x

 

Oct. 12

Dec. 12

 

x

x

x

x

 

 

 

2.3 MPW Schedule 2013

 

Changes are possible till September 1st 2012.

 

2.3.1 Schedule for complete technologies

 

TAPE IN

Shipment

SGB25

SG25

SG13

 

 

V

RH

H1

H3

S (C)

G2

Nov 05, 12

Feb 11, 13

x

x2

x1

 

 

 

Dec 10, 12

Apr 19, 13

 

 

 

 

x

x

Feb 11, 13

May 06, 13

x

x2

 

x

 

 

(Apr 15, 13)

Aug 26, 13

 

 

 

 

x

x

Apr 29, 13

Jul 22, 13

x

x2

x1

x

 

 

Jul 29, 13

Nov 19, 13

 

 

 

 

x

x

Sep 02, 13

Nov 25,13

x

x2

x1

x

 

 

Nov 04, 13

Feb 17, 14

x

x2

x1

 

 

 

Dec 09, 13

21 Apr, 14

 

 

 

 

x

x

 

1 Shipment 7 days later

2 Shipment 21 days later

        0.13 µm Runs

 

2.3.2 Schedule for modules

 

TAPE IN

Shipment
(standard)

GD

H3P

RF-MEMS
switch1

LBE1

Cu Plating (with IZM)2

Nov 05, 12

March 11, 13

x

 

x

x

x

Feb 11, 13

May 27, 13

 

x

x

x

x

Apr 29, 13

Aug 26, 13

x

 

x

x

x

Sep 02, 13

Jan 06, 14

 

x

x

x

x

Nov 04, 13

March 17, 14

x

 

x

x

x

 

1 Localized Backside Etching shipment 12 days later than standard shipment

2 Cu Plating Shipment 8 weeks after standard shipment

 

2.4 Information on Minimum Size per MPW Run 2012

 

There is no minimum area request if a technology or module is offered in schedule tables in chapter 2.2 and 2.3.

If this is not the case, a technology or module can be ordered with a minimum area given in the following table. A waiver from foundry and registration 4 weeks before TAPE out is necessary in this case.

 

Process

Min Area [mm²]

Min Area1 for discount

SG25H1

10

10

SG25H3

12

15

SG25H3P

10

12

SGB25V

-

17

SGB25RH

10

20

GD-module

15

20

SG13S

-

10

SG13C

-

no

SG13G2

5

10

1 Ask for special price if you need more than this area for one MPW run

 

Delivery

40 diced samples, E-test data including RF measurements. Thinning of samples between 300 µm and 370 µm.

Hot lots and additional dies are available upon request.

 

Engineering Runs

An engineering run consists of a separate mask set and the delivery of six wafers. For an Engineering Run a minimum lot size of 18 wafer will be started. Few wafer will be stopped as backup before Backend. Additional wafers are available upon request. Total test field area is 10.62mm times 21.87mm = 232.3 mm2. To calculate the usable area for customers you have to subtract test structure area.

 

Volume Runs

A volume run consists of a separate mask set with reduced engineering costs and minimum wafer order. For detailed information contact IHP.

 

IHP's General Terms and Conditions apply.

 

For further information please contact:

Dr. Rene Scholz

IHP GmbH

Im Technologiepark 25

15236 Frankfurt (Oder)

Germany

Phone: +49 335 5625 647

Fax: +49 335 5625 327

Email: scholz@ihp-microelectronics.com




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23-06-11
10th Workshop
High-Performance SiGe:C BiCMOS (September 21, 2011) and Tutorial IHP Design Kits (September 22-23, 2011)

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