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   Design Kit

 

The design kits support a Cadence mixed signal platform:

 

  • Design Framework II (Cadence 5.14 / 6.1)
  • Behavioral Modeling (Verilog HDL)
  • Logic Synthesis & Optimization (VHDL / HDL Compiler, Design Compiler / Synopsys,
        Power Compiler / Synopsys)
  • Test Generation / Synthesizer / Test Compiler (Synopsys)
  • Simulation (RF: SpectreRF, Analog: SpectreS, Behavioral / Digital: Leapfrog / NC-Affirma /
        Verilog-XL / ModelSim)
  • Place & Route (Silicon Ensemble & Preview)
  • Layout (Virtuoso Editor - Cadence)
  • Verification (Assura and Diva: DRC / LVS / Extract / Parasitic Extraction)
  • ADS-support via Golden Gate/RFIC dynamic link to Cadence is available
  • Standalone ADS Kit including Momentum substrate layer file
  • Layout support in SG25H3 and SG25H1 (Q4 2009)
  • Support of Analog Office, TexEDA, and Tanner via partners is available
  • ECL library for SGB25V
  • Radiation hard CMOS library and ECL library



  • print version



    23-06-11
    10th Workshop
    High-Performance SiGe:C BiCMOS (September 21, 2011) and Tutorial IHP Design Kits (September 22-23, 2011)

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