Development of a fractional-N frequency synthesizer for satellite communications
SiGe Space Synthesizer (SISSI)
The Objective
The goal of this project is to develop an integrated wideband frequency synthesizer for satellite communications tunable from 8.3 to 11.7 GHz. The main target applications are HDTV and internet-via-satellite services such as DVB-RCS. The fractional-N PLL architecture allows a fine frequency resolution in order to guarantee high flexibility for different applications. The phase noise requirements are very stringent (< -110 dBc/Hz at 1 MHz offset). Moreover, the spurs in the spectrum have to be as small as -70 dBc. The synthesizer must work robustly from -20 to 85 °C. This includes a PLL tuning range compatible with device parameter variations as well as radiation hardness.
IHP’s Contribution
IHP is designing the RF circuitry of the PLL including voltage-controlled oscillators (VCO) and high-speed frequency dividers. The top-level chip design will be done at IHP. Finally, the chips will be manufactured in IHP's 0.25 µm low-cost SiGe BiCMOS technology SGB25VD.
Funding
This research is funded by the European Space Agency (ESA) and the German DLR (Deutsches Zentrum für Luft- und Raumfahrt).
Project Partners
Kayser-Threde GmbH, IMST GmbH
Selected Publications
[1] S. A. Osmany, F. Herzel, K. Schmalz, and W. Winkler, "Phase Noise and Jitter Modeling for Fractional-N PLLs," Advances in Radio Science, vol. 5, pp. 313-320, 2007.
[2] S. A. Osmany, F. Herzel, J. C. Scheytt, K. Schmalz, and W. Winkler, "An Integrated 19-GHz Low-Phase-Noise Frequency Synthesizer in SiGe BiCMOS Technology," in Proceedings of the 29th Compound Semiconductor IC (CSIC), Portland, USA, pp. 191-194.
[3] R. Follmann, D. Köther, T. Kohl, M. Engels, V. Heyer, K. Schmalz, F. Herzel, W. Winkler, S. Osmany, and U. Jagdhold, "A Low Phase Noise Integrated SiGe 18..20 GHz Fractional-N Synthesizer," in Proceedings of the 3rd European Microwave Integrated Circuits Conference (EuMIC2007), Munich, Germany, pp. 263-266, Oct. 2007.