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  • Publications 2016

Publications 2016

since January 2016

(1) Ag Films Grown by Remote Plasma Enhanced Atomic Layer Deposition on Different Substrates
A. Amusan, B. Kalkofen, H. Gargouri, K. Wandel, C. Pinnow, M. Lisker, E.P. Burte
Journal of Vacuum Science and Technology A 34(01), 01A126 (2016)
Silver (Ag) layers were deposited by remote plasma enhanced atomic layer deposition (PALD)
using Ag(fod)(PEt3) (fod¼2,2-dimethyl-6,6,7,7,8,8,8-heptafluorooctane-3,5-dionato) as precursor
and hydrogen plasma on silicon substrate covered with thin films of SiO2, TiN, Ti/TiN, Co, Ni, and W at different deposition temperatures from 70 to 200 °C. The deposited silver films were
analyzed by x-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), scanning
electron microscopy (SEM), transmission electron microscopy (TEM) with energy dispersive x-ray spectroscopy, four point probe measurement, ellipsometric measurement, x-ray fluorescence (XRF), and x-ray diffraction (XRD). XPS revealed pure Ag with carbon and oxygen contamination close to the detection limit after 30 s argon sputtering for depositions made at 120 and 200 °C substrate temperatures. However, an oxygen contamination was detected in the Ag film deposited at 70 °C after 12 s argon sputtering. A resistivity of 5.7 x 10-6 Ω cm was obtained for approximately 97 nm Ag film on SiO2/Si substrate. The thickness was determined from the SEM cross section on the SiO2/Si substrate and also compared with XRF measurements. Polycrystalline cubic Ag reflections were identified from XRD for PALD Ag films deposited at 120 and 200 °C. Compared to W surface, where poor adhesion of the films was found, Co, Ni, TiN, Ti/TiN and SiO2 surfaces had better adhesion for silver films as revealed by SEM, TEM, and AFM images.

(2) Capping of Rare Earth Silicide Nanowires on Si(001)
St. Appelfeller, M. Franz, M. Kubicki, P. Reiß, T. Niermann, M.A. Schubert, M. Lehmann, M. Dähne
Applied Physics Letters 108, 013109 (2016)
The capping of Tb and Dy silicide nanowires grown on Si(001) was studied using scanning tunneling microscopy and cross-sectional high-resolution transmission electron microscopy. Several nanometers thick amorphous Si films deposited at room temperature allow an even capping, while the nanowires maintain their original structural properties. Subsequent recrystallization by thermal annealing leads to more compact nanowire structures and to troughs in the Si layer above the nanowires, which may even reach down to the nanowires in the case of thin Si films, as well as to V-shaped stacking faults forming along {111} lattice planes. This behavior is related to strain due to the lattice mismatch between the Si overlayer and the nanowires.

(3) Technology Modules from Micro- and Nano-Electronics for the Life Sciences
M. Birkholz, A. Mai, Ch. Wenger, Ch. Meliani, R. Scholz
Wiley Interdisciplinary Reviews (WIREs). Nanomedicine & Nanobiotechnology 8, 355 (2016)
(Bioelectronics)
The capabilities of modern semiconductor manufacturing offer interesting possibilities to be applied in the life sciences as well as for their commercialization. In this review, the technology modules available in micro- and nano-electronics are exemplarily outlined for the case of 250 and 130 nm technology nodes. Their preparation procedures and the different transistor types as available in CMOS and BiCMOS technologies are introduced as the key elements of comprehensive chip architectures. Techniques for circuit design and the elements of fully integrated bioelectronics systems are presented. The possibility for external customers to make use of these technology modules for their research or development projects via so-called multi-project wafer services is emphasized. Various examples from diverse fields like (1) immobilization of biomolecules and cells on semiconductor surfaces, (2) biosensors operating by affinity principles, surface-acoustic waves, microring-resonators and dielectrophoresis, (3) complete systems for human body implants and monitors for bioreactors, and (4) the combination of microelectronics with microfluidics either by chip-in-plastic integration as well as Si-based microfluidic are demonstrated from common projects with partners from biotechnology and medicine.

(4) Microelectronics for Biotechnology
M. Birkholz, F.I. Jamal, J. Wessel, R. Scholz, P. Neubauer
Proc. Engineering and Life, abstr. book, 17 (2017)
(Bioelectronics)

(5) Continuously Operating Biosensor and its Integration into a Hermetically Sealed Medical Implant
M. Birkholz, P. Glogener, F. Glös, T. Basmer, L. Theuer
Micromachines 7, 183 (2016)
(Bioelectronics)
An integration concept for an implantable biosensor for the continuous monitoring of blood sugar levels is presented. The system architecture is based on technical modules used in
cardiovascular implants in order to minimize legal certification efforts for its perspective usage in medical applications. The sensor chip operates via the principle of affinity viscometry, which is realized by a fully embedded biomedical microelectromechanical systems (BioMEMS) prepared in 0.25-µm complementary metal–oxide–semiconductor (CMOS)/BiCMOS technology. Communication with a base station is established in the 402–405 MHz band used for medical implant communication services (MICS). The implant shall operate within the interstitial tissue, and the hermetical sealing of the electronic system against interaction with the body fluid is established using titanium housing. Only the sensor chip and the antenna are encapsulated in an epoxy header closely connected to the metallic housing. The study demonstrates that biosensor implants for the sensing of low-molecular-weight metabolites in the interstitial may successfully rely on components already established in cardiovascular implantology.

(6) A 6 Bit Vector-Sum Phase Shifter With a Decoder Based Control Circuit for X-Band Phased-Arrays
B. Cetindogan, E. Ozeren, B. Ustundag, M. Kaynak, Y. Gurbuz
IEEE Microwave and Wireless Components Letters 26(1), 64 (2016)

(7) Dispersion-Optimized Multicladding Silicon Nitride Waveguides for Nonlinear Frequency Generation from Ultraviolet to Mid-Infrared
J.M. Chavez Boggio, A. Ortega Monux, D. Modotto, T. Fremberg, D. Bodenmüller, D. Giannone, M.M. Roth, T. Hansson, S. Wabnitz, E. Silvestre, L. Zimmermann
Journal of the Optical Society of America B: Optical Physics 33(11), 2402 (2016)
(Photonics)
Nonlinear frequency conversion spanning from the ultraviolet to the mid-infrared (beyond 2.4 μ m) is experimentally demonstrated in multicladding silicon nitride (SiXNY ) waveguides. By adjusting the waveguide cross-section the chromatic dispersion is flattened, which enhances both the efficiency and the bandwidth of the nonlinear conversion. How accurately the dispersion is tailored is assessed through chromatic dispersion measurements and an
experiment/simulation comparison of the dispersive waves’ wavelength locations. Undesirable fluctuations of both the refractive index and the dimensions of the waveguide during the fabrication process result in a dispersion unpredictability of at least 20 ps/nm/km. Finally, manipulation of the effective refractive index allows for multiple third harmonic generated tones spanning from 381 to 715 nm.

(8) Equivalent Circuit Models for Silicon Photonics Devices
W.Y. Choi, M. Shin, J.-M. Lee, L. Zimmermann
Proc. Asia Communications and Photonics Conference (ACP 2016), ATh2G.2 (2016)
(Photonics)
We present equivalent circuit models for Si micro-ring modulators and Ge-on-Si
photodetectors. Model parameters are extracted from measurement and simulation. These circuit
models are very useful for designing Si photonic and electronic ICs.

(9) Radiation-Hardened SiGe BiCMOS Technologies for Analogue and Mixed-Signal ICs
M. Cirillo, F. Teply, G. Fischer, R. Sorge, J. Schmidt, M. Krstic, V. Petrovic
Proc. 6th International Workshop on Analogue and Mixed Signal Integrated Circuits for Space Applications (AMICSA 2016), 48 (2016)
Introduction :
IHP is actively involved since many years in developing and providing un-restricted access to their high-performance 250nm and 130nm SiGe BiCMOS Technologies and Services.
In response to the strategic European non-dependence process for critical Space Technologies like EEE components, aiming to ensuring European free, un-restricted acces to any required space technology supply chain, IHP has been involved in the development of RadHard SiGe Process Design Kits (PDKs) for their SiGe BiCMOS technologies. For the 250nm node, a RadHard PDK SGB25RH has been developed and evaluated in accordance to the ESCC 2269010 Basic Specification “Evaluation Test Programme for MMICs” and will be filing for EPPL Listing in 2016 while for the 130nm Technology node, PDK SG13RH is under development and sensitivity to radiation (TID, DD, SEEs) is being evaluated before going through the full ESCC 2269010 Evaluation Test Programme (2017-2019) and release the SG13RH technology for EPPL Listing within 2020.
Content :
The integration of Silicon-Germanium (SiGe) onto BiCMOS technology platforms have been proven an economically viable and valuable technology for the design and implementation of low power highly integrated microwave monolithic integrated circuits (MMICs) operating at very high frequencies together with complex CMOS functions unavailable in other technologies. SiGe HBTs exhibit intrinsic advantages – such as a very high tolerance to Total Ionizing Dose (TID) greater than 1 Mrad(Si) and improved performances down to cryogenic temperatures – which make them excellent candidates for space-based applications which any independent ASIC/MMIC Design House can use to develop electronic components for the space market.
The presentation will focus on presenting the 250nm and 130nm IHP SiGe BiCMOS Processes, the contents of the RadHard PDKs (devices and libraries), the definition of the Capability Domain, status and results of the Evaluation Tests in accordance with ESCC-2269010 on the various Test Vehicles (TCV, DECs and RIC) .  More recent results concerning radiation tests and reliability evaluations on both CMOS and SiGe HBT devices will be presented focusing on the failure modes of such devices and the required derating factors necessary to achieve reliability and mission lifetimes.

Conclusion :
The presentation will conclude with the description of IHP's access policy to the Rad Hard Design Kits and supported services (i.e. Lot Acceptance Tests – LATs defined in Process Identification Document – PID) from IHP and partners like Arquimea GmBH as well as the currently on-going activities and technology (such as Rad Hard LDMOS and Junction Isolated Cascode –JIC- CMOS) and library IP developments and enhancements foreseen for inclusion in future updates of the PDKs.
In addition a short overview of the current on-going R&D technology developments undertaken by IHP on their available commercial processes and IHP’s vision to the “More-than-Moore” approach like integration of THz Devices, Embedded RF-MEMS, Heterogeneous Integration (Micro-Fluidics, Through Silicon Vias, III-V on Si BiCMOS), Resistive-RAMs and Silicon Photonics  which could prove useful for future compact low weight electronic components and System-on-Chip solutions for  future Space or Ground-segment applications.

(10) Design and On-Wafer Characterization of G-Band SiGe HBT Low-Noise Amplifiers
C.T. Coen, A.C. Ulusoy, P. Song, A. Ildefonso, M. Kaynak, B. Tillack, J.D. Cressler
IEEE Transactions on Microwave Theory and Techniques 64(11), 3631 (2016)
This paper presents the design and thorough on-wafer characterization of two G-band low-noise amplifiers (LNAs) implemented using 0.13-μm silicongermanium (SiGe) heterojunction bipolar transistors (HBTs) with peak fT / fmax of 300/500 GHz. The impact of the substrate network and optimized via interconnections on the SiGe HBT performance is investigated to ensure that maximum performance is extracted from each SiGe HBT. The two LNAs are separately implemented using only cascode pairs and only common-emitter (CE) SiGe HBTs to determine which configuration yields better performance in a multistage G-band
LNA. The cascode LNA achieves a peak gain of 24.0 dB at 158 GHz with a mean noise figure (NF) of 8.2 dB from 145 to 165 GHz, while the CE LNA achieves a 17.2 dB of gain at 183 GHz with a mean NF of 8.0 dB across 165–200 GHz. A novel implementation of blackbody noise sources for on-wafer Y-factor NF measurements reduces the waveguide length needed to transition between the antenna and the probe, which significantly reduces the sensitivity to jitter. To the authors’ knowledge, these LNAs achieve the lowest reported NF of all SiGe LNAs at these frequencies to date, and the results demonstrate that SiGe HBTs are viable options for millimeter-wave performance-constrained applications.

(11) 7-Bit SiGe-BiCMOS Step Attenuator for X-Band Phased-Array RADAR Applications
M. Davulcu, C. Caliskan, I. Kalyoncu, M. Kaynak, Y. Gurbuz
IEEE Microwave and Wireless Components Letters 26(8), 598 (2016)
(IHP-Sabanci Joint Lab)

(12) Low-Loss DC-100 GHz Suspended Microstrip Lines on Micromachined SiGe BiCMOS BEOL Technology
R. De Paolis, M. Kaynak, F. Cocetti
IEEE Microwave and Wireless Components Letters 26(4), 225 (2016)
A new class of low-loss transmission lines implemented on the BEOL of a 0.25 μm SiGe BiCMOS technology is presented and experimentally demonstrated up to 100 GHz. The
approach consists in a monolithic microstrip line suspended on an air cavity by means of two novel structural solutions. With respect to a conventional transmission line in the same technology, an attenuation loss reduction of up to 3 dB/cm has been reached at
60 GHz.

(13) Coherent Photonic Beamformer for a Ka-Band Phased Array Antenna Receiver Implemented in Silicon Photonic Integrated Circuit
V.C. Duarte, A. Peczek, M.V. Drummond, R.N. Nogueira, G. Winzer, D. Petousi,L. Zimmermann
Proc. International Conference on Space Optics (ICSO 2016), (2016)
(BEACON)
The generation of satellite communications with flexible and efficient transmission of radio signals requires a large number of low interfering beams and a maximum exploitation of the available frequency spectrum.

(14) A Wideband Monolithically Integrated Photonic Receiver in 0.25-μm SiGe:C BiCMOS Technology
M.H. Eissa, A. Awny, G. Winzer, M. Kroh, St. Lischke, D. Knoll, L. Zimmermann, D. Kissinger, A.C. Ulusoy
Proc. European Solid-State Circuits Conference (ESSCIRC 2016), 487 (2016)
This work presents a 54 Gb/s monolithically integrated silicon photonics receiver (Rx). A germanium photodiode (Ge-PD) is monolithically integrated with a transimpedance amplifier (TIA) and low frequency feedback loop to compensate for the DC input overload current. Bandwidth enhancement techniques are used to extend the bandwidth compared to previously
published monolithically integrated receivers. Implemented in a 0.25 μm SiGe:C BiCMOS electronic/photonic integrated circuit (EPIC) technology, the Rx operates at  λ= 1.55 μm, achieves an optical/electrical (O/E) bandwidth of 47 GHz with only 5 ps group delay variation and a sensitivity of -2dBm for 4.5e-11BER at 40 Gb/s and -1.3dBm for 1.05e-6BER at 54 Gb/s. It dissipates 73mW of power, while occupying 1.6mm2 of area. To the best of the author’s knowledge, this work presents the state-of-the art bandwidth and bit rate in monolithically integrated photonic receivers.

(15) Characterization of Reclaimed GaAs Substrates and Investigation of Reuse for Thin Film InGaAlP LED Epitaxial Growth
M. Englhard, C. Klemp, M. Behringer, A. Rudolph, O. Skibitzki, P. Zaumseil, T. Schroeder
Journal of Applied Physics 120, 045301 (2016)
This study reports a method to reuse GaAs substrates with a batch process for thin film light
emitting diode (TF-LED) production. The method is based on an epitaxial lift-off technique. With the developed reclaim process, it is possible to get an epi-ready GaAs surface without additional time-consuming and expensive grinding/polishing processes. The reclaim and regrowth process was investigated with a one layer epitaxial test structure. The GaAs surface was characterized by an atomic force microscope directly after the reclaim process. The crystal structure of the regrown In0.5(Ga0.45Al0.55)0.5P (Q55) layer was investigated by high resolution x-ray diffraction and scanning transmission electron microscopy. In addition, a complete TF-LED grown on reclaimed GaAs substrates was electro-optically characterized on wafer level. The crystal structure of the epitaxial layers and the performance of the TF-LED grown on reclaimed substrates are not influenced by the developed reclaim process. This process would result in reducing costs for LEDs and reducing much arsenic waste for the benefit of a green semiconductor production.

(16) Analysis and Modeling of the Long-Term Ageing Rate of SiGe HBTs under Mixed-Mode Stress
G.G. Fischer
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 106 (2016)
By means of long-term mixed-mode stress tests of high-speed SiGe HBTs an empirical ageing function for compact models was constructed. This ageing function models saturation of the aging rate as a function of stress time and stress current and is applicable for all relevant mixed-mode stress conditions of this HBT type. Additionally, 1000h stress tests on a high-voltage HBT revealed that not only saturation but even reversal of ageing rate is possible in the long run.

(17) 3D Through Silicon Via Profile Metrology Based on Spectroscopic Reflectometry for SOI Applications
O. Fursenko, J. Bauer, St. Marschmeyer
Proc. SPIE Photonics Europe, Optical Micro- and Nanometrology VI, 9890, 989015 (2016)

(18) High Speed BiCMOS Linear Driver Core for Segmented InP Mach-Zehnder Modulators
I. Garcia Lopez, P. Rito, D. Micusik, A. Aimone, T. Brast, M. Gruner, G. Fiol, A. Steffan, J. Borngräber, L. Zimmermann, D. Kissinger, A.C. Ulusoy
Analog Integrated Circuits and Signal Processing 87(2), 105 (2016)
(SASER)
A hybrid arrangement for an optical transmitter sub-system comprising a linear driver fabricated in IHP SiGe 0.13 lm BiCMOS technology with an InP segmented Mach-Zehnder modulator is described. The proposed scheme, with direct interface to the digital to analog converter,
is suitable for coherent high order modulation formats intended for data transmission over optical fiber at a wavelength of 1550 nm. In this paper, a partial prototype, consisting of a single driver core and modulator segment is demonstrated. The driver core features an output differential
voltage of 2.5 Vpp, a gain of 9 dB and a 3 dB bandwidth of 32 GHz. Linearity is evaluated through total harmonic distortion measurements. With on–off-keying modulation, electro-optical eye diagram measurements of the single segment demonstrate successful operation up to
40 Gb/s data rate. While exhibiting clear capability for high speed operation, these results serve also to explore the boundaries of the proposed hybrid configuration.

(19) A 50 Gb/s TIA in 0.25μm SiGe:C BiCMOS in Folded Cascode Architecture with pnp HBTs
I. Garcia Lopez, P. Rito, A. Awny, B. Heinemann, D. Kissinger, A.C. Ulusoy
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 9 (2016)

(20) Biostability Investigations of a Silicone-Encapsulated Biosensor Implant after 17 Months of in Vivo Exposure
P. Glogener, M. Krause, J. Katzer, M.A. Schubert, M. Birkholz, O. Bellmann, C. Weber, C. Metges, C. Welsch, R. Ruff, K. P. Hoffmann
Proc. 9th Engineering of Functional Interfaces (EnFi 2016), abstr. book (2016)
(Bioelectronics)
A silicone-encapsulated biosensor implant was tested in vivo by implanting it in the musculus trapezii of cattle. The implant is intended for continuous monitoring of glucose concentrations in subcutaneous tissue. The goal of the study was the validation of the implant biostability. The test system was sterilized, wrapped into OP mesh and implanted into subcutaneous tissue. After 17 months the device was explanted, sterilized and examined. Investigations focused on the sensor chip by scanning electron microscopy, transmission electron microscopy and elemental analysis by energy-dispersive X-ray spectroscopy. The sensor chip was uncorroded, but was covered by a thin biofilm.

(21) A 0.55 THz Near-Field Sensor With a µm-Range Lateral Resolution Fully Intergrated in 130nm SiGe BiCMOS 
J. Grzyb, B. Heinemann, U.R. Pfeiffer
IEEE Journal of Solid State Circuits 51(12), 3063 (2016)
(Dotseven)
This paper presents a room-temperature operating superresolution terahertz (THz) planar near-field solidstate sensor breaking the diffraction limit. Contrary to classical
superresolution imagers implemented in the optical domain, the sensor features inbuilt illumination, evanescent-field sensing, and detection on a single chip, eliminating the need for any external optics. Both metallic and dielectric objects can be imaged with the sensor and mapped into a monotonic sensor response. It is operated around 533–555 GHz in 130 nm SiGe HBT technology and is capable of resolving structural details with a μm-range
resolution and a high response of up to 21.7 μA with no amplification stages in the readout path. Here, the stop-band characteristic of a differentially driven 3-D split-ring resonator
with high spatial confinement of evanescent surface fields is exploited as an object-tunable transmission modulator inserted in-plane between a tunable 3-push Colpitts oscillator and a
broadband power detector. A separate antenna-coupled oscillator breakout provides a radiated power of up to 45 μW (−13.4 dBm). This paper further demonstrates the 2-D scanned superresolution image with a remarkable SNR of up to 40 dB for the sensor operating at dc.

(22) A 0.55 THz Near-Field Sensor With a µm-Range Lateral Resolution Fully Intergrated in 130nm SiGe BiCMOS 
J. Grzyb, B. Heinemann, U. R. Pfeiffer
IEEE Journal of Solid State Circuits 51(12), 3063 (2016)
(Dotseven)
This paper presents a room-temperature operating superresolution terahertz (THz) planar near-field solid state sensor breaking the diffraction limit. Contrary to classical superresolution imagers implemented in the optical domain, the sensor features inbuilt illumination, evanescent-field sensing, and detection on a single chip, eliminating the need for any external
optics. Both metallic and dielectric objects can be imaged with the sensor and mapped into a monotonic sensor response. It is operated around 533–555 GHz in 130 nm SiGe HBT technology and is capable of resolving structural details with a μm-range resolution and a high response of up to 21.7 μA with no amplification stages in the readout path. Here, the stop-band characteristic of a differentially driven 3-D split-ring resonator with high spatial confinement of evanescent surface fields is exploited as an object-tunable transmission modulator inserted in-plane between a tunable 3-push Colpitts oscillator and a
broadband power detector. A separate antenna-coupled oscillator breakout provides a radiated power of up to 45 μW (−13.4 dBm). This paper further demonstrates the 2-D scanned superresolution image with a remarkable SNR of up to 40 dB for the sensor operating at dc.

(23) A 210–270-GHz Circularly Polarized FMCW Radar with a Single-Lens-Coupled SiGe HBT Chip
J. Grzyb, K. Statnikov, N. Sarmah, B. Heinemann
IEEE Transactions on Terahertz Science and Technology 6(6), 771 (2016)
(Dotseven)
A complete circularly polarized 210–270-GHz frequency-modulated continuous-wave radar with a monostatic homodyne architecture is presented. It consists of a highly integrated radio-frequency transceiver module, an in-house developed linear-frequency chirp generator, and a data acquisitionchain. The radar front end featuring a fundamentally operated ×16 multiplier-chain architecture is realized as a single chip in 0.13-μm SiGe heterojunction bipolar transistor technology with a lens-coupled circularly polarized on-chip antenna and wire-bonded on a low-cost printed circuit board. In combination with a 9-mm-diameter silicon lens, the module achieves an average in-band directivity of 26.6 dB. The measured peak radiated power from the packaged radar module is +5 dBm and the noise figure is 21 dB. For a 60-GHz frequency sweep, the radar achieves a range resolution of 2.57 mm after calibration, which is close to the theoretical bandwidth-limited resolution of 2.5 mm.With a simple
scanning optical setup, this paper further demonstrates the 3-D imaging capability of the radar for detection of hidden objects with a remarkable dynamic range of around 50 dB.

(24) A Fully-Integrated 0.55THz Near-Field Sensor with a Lateral Resolution down to 8μm in 130nm SiGe BiCMOS
J. Grzyb, B. Heinemann, U.R. Pfeiffer
Proc. International Solid-State Circuits Conference (ISSCC 2016), 424 (2016)
(Dotseven)

(25) Low-Power, Ultra-Compact, Fully-Differential 40Gbps Direct Detection Receiver in 0.25 µm Photonic BiCMOS SiGe Technology
S. Gudyriev, J.C. Scheytt, St. Meister, C. Meuer, D. Knoll, St. Lischke, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 178 (2016)
(SPEED)

(26) SiGe HBT with fT/fmax of 505 GHz/720 GHz
B. Heinemann, H. Rücker, R. Barth, F. Bärwolf, J. Drews, G.G. Fischer, A. Fox, O. Fursenko, T. Grabolla, F. Herzel, J. Katzer, J. Korn, A. Krüger, P. Kulse, T. Lenke, M. Lisker, St. Marschmeyer, A. Scheit, D. Schmidt, J. Schmidt, M.A. Schubert, A. Trusch, Ch. Wipf, D. Wolansky
Proc. IEEE International Electron Devices Meeting (IEDM 2016), 16-51 (2016)

(27) UHF Dielectrophoretic Handling of Individual Biological Cells Using BiCMOS Microfluidic Microsystems
F. Hjeij, C. Dalmay, A. Bessaudou, P. Blondy, A. Pothier, B. Bessette, G. Bergaud, M.O. Jauberteau, F. Lalloue, C. Baristiran Kaynak, M. Kaynak, C. Palego
Proc. European Microwave Week (EuMW 2016), 265 (2016)

(28) Single-Event Transient Response of Comparator Pre-Amplifiers in a Complementary SiGe Technology
A. Ildefonso, N.E. Lourenco, Z.E. Fleetwood, M.T. Wachter, A.S. Cardoso, N.J.-H. Roche, A. Khachatrian, D. McMorrow, S.P. Buchner, J.H. Warner, P. Paki, M. Kaynak, B. Tillack, D. Knoll, J.D. Cressler
Proc. IEEE Nuclear and Space Radiation Effects Conference (NSREC 2016), (2016)

(29) Zero Gate-Bias Terahertz Detection with an Asymmetric NMOS Transistor
R. Jain, H. Rücker, U. Pfeiffer
Proc. International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz 2016), (2016)
(Dotseven)

(30) An Ultra-Low phase Noise 3.37-3.58 GHz MEMS Varactor Based VCO with Continuous Frequency Tuning
G. Kahmen, M. Wietstruck, H. Schumacher
Proc. IEEE MTT-S International Microwave Symposium (IMS 2016), (2016)
(MEMS Integration)

(31) Doping of High-Aspect Ratio Silicon Structures using Thin Film Dopant Sources Grown by PALD
B. Kalkofen, A.A. Amusan, M. Lisker, Y.S. Kim, E.P. Burte
Proc. 16th International Conference on Atomic Layer Deposition (ALD 2016), (2016)

(32) Plasma Enhanced Atomic Layer Deposition of SiO2 Thin Films using TDMAS Precursor
I. Kärkkänen, F. Naumann, M. Lisker, A. Scheit, I. Costina, T. Grabolla, H. Gargouri
Proc. 16th International Conference on Atomic Layer Deposition (ALD 2016), 0107 (2016)

(33) Future of SiGe BiCMOS Technologies with "More-than-Moore" Modules for mm-wave and THz Applications
M. Kaynak, A. Mai
Proc. IEEE Symposium on Microelectronics Technology and Devices (SBMicro 2016), 1 (2016)

(34) An Integrated Mach-Zehnder Modulator Bias Controller Based on Eye-Amplitude Monitoring
M.-H. Kim, H.-Y. Jung, L. Zimmermann, W.-Y. Choi
Proc. SPIE , 9751, 97510X-1 (2016)
(SPEED)
A novel integrated Mach-Zehnder modulator (MZM) bias controller based on eye-amplitude monitoring is demonstrated in IHP’s 0.25-μm BiCMOS technology. The bias controller monitors the MZM output light, automatically moves the MZM bias voltage to the optimal value that produces the largest eye amplitude, and maintains it there even if the MZM transfer characteristics change due to thermal drift. The controller is based on the feedback loop consisting of Si photodetector, trans-impedance amplifier, rectifier, square amplifier, track-and-hold circuit, comparator, polarity changer, and charge-pump, all of which are monolithically integrated. The area of the controller is 0.083-mm2 and it consumes 92.5-mW. Our bias controller shows successful operation for a commercially-available 850-nm LiNbO3 MZM
modulated with 3-Gbps PRBS data by maintaining a very clean eye for at least 30 minutes. Without the controller, the eye for the same MZM modulation becomes completely closed due to thermal drift. The data rate is limited by the Si PD integrated in the controller not by the controller architecture. Since our controller is based on the Si BiCMOS technology which can also provide integrated Si photonics devices on the same Si, it has a great potential for realizing a Si MZM with an integrated bias controller, which should fully demonstrate the advantage of electronic-photonic integrated circuit technology.

(35) Investigation of the Composition of the Si/SiO2 Interface in Oxide Precipitates and Oxide Layers on Silicon by STEM/EELS
G. Kissinger, M.A. Schubert, D. Kot, T. Grabolla
ECS Transactions 75(4), 81 (2016)
(Aeternitas)

(36) Investigation of the Composition of the Si/SiO2 Interface in Oxide Precipitates and Oxide Layers on Silicon by STEM/EELS
G. Kissinger, M.A. Schubert, D. Kot, T. Grabolla
ECS Transactions 75(4), 81 (2016)
(Future Silicon Wafers)

(37) Perfluorodecyltrichlorosilane-Based Seed-Layer for Improved Chemical Vapour Deposition of Ultrathin Hafnium Dioxide Films on Graphene
J. Kitzmann, A. Göritz, M. Fraschke, M. Lukosius, Ch. Wenger, A. Wolff, G. Lupina
Scientific Reports 6, 29223 (2016)
(Graphen)
We investigate the use of perfluorodecyltrichlorosilane-based self-assembled monolayer as seeding layer for chemical vapor deposition of HfO2 on large area CVD graphene. The deposition and evolution of the FDTS-based seed layer is investigated by X-ray photoelectron spectroscopy, Auger electron spectroscopy, and transmission electron microscopy. Crystalline quality of graphene transferred from Cu is monitored during formation of the seed layer as well as the HfO2 growth using Raman spectroscopy. We demonstrate that FDTS-based seed layer greatly improves nucleation of HfO2 layers so that graphene can be coated in a conformal way with HfO2 layers as thin as 10 nm. Proof-of-concept experiments on 200 mm wafers presented here validate applicability of the proposed approach to wafer scale graphene device fabrication.

(38) Resolving the Nanostructure of Plasma-Enhanced Chemical Vapor Deposited Nanocrystalline SiOx layers for Application in Solar Cells
M. Klingsporn, S. Kirner, C. Villringer, D. Abou-Ras, I. Costina, M. Lehmann, B. Stannowski
Journal of Applied Physics 119, 223104 (2016)
(PVcomB)
Nanocrystalline silicon suboxides (nc-SiOx) have attracted attention during the past years for the
use in thin-film silicon solar cells. We investigated the relationships between the nanostructure as
well as the chemical, electrical, and optical properties of phosphorous, doped, nc-SiO0.8:H fabricated
by plasma-enhanced chemical vapor deposition. The nanostructure was varied through the
sample series by changing the deposition pressure from 533 to 1067 Pa. The samples were then
characterized by X-ray photoelectron spectroscopy, spectroscopic ellipsometry, Raman spectroscopy,
aberration-corrected high-resolution transmission electron microscopy, selected-area electron
diffraction, and a specialized plasmon imaging method. We found that the material changed
with increasing pressure from predominantly amorphous silicon monoxide to silicon dioxide containing
nanocrystalline silicon. The nanostructure changed from amorphous silicon filaments to
nanocrystalline silicon filaments, which were found to cause anisotropic electron transport.

(39) SiGe BiCMOS for Optoelectronics
D. Knoll, St. Lischke, A. Awny, L. Zimmermann
ECS Transactions 75(8), 121 (2016)
(MOSAIC)
Silicon-based electronic-photonic integrated circuit (ePIC) technology enables a high degree of integration of optoelectronic subsystems for optical communications. In this paper we give an overview about IHP’s work in ePIC technology development under use of different SiGe BiCMOS baseline processes. Focus is on “Photonic BiCMOS”, a new monolithic ePIC technology which combines high-performance BiCMOS technology with high-speed
photonic devices for electronic-photonic submodules for next generation communication networks. Main features of this technology are described, including an overview of offered
photonic and electronic devices. Examples of demonstrator circuits fabricated in the new technology are also presented. Another approach of merging photonics with electronics is hybrid assembly. In a second part of the paper we will demonstrate the potential of
SiGe BiCMOS as the ‘electronics supplier’ for this approach.

(40) SiGe BiCMOS for Optoelectronics
D. Knoll, St. Lischke, A. Awny, L. Zimmermann
ECS Transactions 75(8), 121 (2016)
(SPEED)
Silicon-based electronic-photonic integrated circuit (ePIC) technology enables a high degree of integration of optoelectronic subsystems for optical communications. In this paper we give an overview about IHP’s work in ePIC technology development under use of different SiGe BiCMOS baseline processes. Focus is on “Photonic BiCMOS”, a new monolithic ePIC technology which combines high-performance BiCMOS technology with high-speed
photonic devices for electronic-photonic submodules for next generation communication networks. Main features of this technology are described, including an overview of offered
photonic and electronic devices. Examples of demonstrator circuits fabricated in the new technology are also presented. Another approach of merging photonics with electronics is hybrid assembly. In a second part of the paper we will demonstrate the potential of
SiGe BiCMOS as the ‘electronics supplier’ for this approach.

(41) SiGe BiCMOS for Optoelectronics
D. Knoll, St. Lischke, A. Awny, L. Zimmermann
ECS Transactions 75(8), 121 (2016)
(SASER)
Silicon-based electronic-photonic integrated circuit (ePIC) technology enables a high degree of integration of optoelectronic subsystems for optical communications. In this paper we give an overview about IHP’s work in ePIC technology development under use of different SiGe BiCMOS baseline processes. Focus is on “Photonic BiCMOS”, a new monolithic ePIC technology which combines high-performance BiCMOS technology with high-speed
photonic devices for electronic-photonic submodules for next generation communication networks. Main features of this technology are described, including an overview of offered
photonic and electronic devices. Examples of demonstrator circuits fabricated in the new technology are also presented. Another approach of merging photonics with electronics is hybrid assembly. In a second part of the paper we will demonstrate the potential of
SiGe BiCMOS as the ‘electronics supplier’ for this approach.

(42) SiGe BiCMOS for Optoelectronics
D. Knoll, St. Lischke, A. Awny, L. Zimmermann
ECS Transactions 75(8), 121 (2016)
(RF2THzSiSoC)
Silicon-based electronic-photonic integrated circuit (ePIC) technology enables a high degree of integration of optoelectronic subsystems for optical communications. In this paper we give an overview about IHP’s work in ePIC technology development under use of different SiGe BiCMOS baseline processes. Focus is on “Photonic BiCMOS”, a new monolithic ePIC technology which combines high-performance BiCMOS technology with high-speed
photonic devices for electronic-photonic submodules for next generation communication networks. Main features of this technology are described, including an overview of offered
photonic and electronic devices. Examples of demonstrator circuits fabricated in the new technology are also presented. Another approach of merging photonics with electronics is hybrid assembly. In a second part of the paper we will demonstrate the potential of
SiGe BiCMOS as the ‘electronics supplier’ for this approach.

(43) BiCMOS Silicon Photonics Platform for Fabrication of High-Bandwidth Electronic-Photonic Integrated Circuits
D. Knoll, St. Lischke, A. Awny, M. Kroh, E. Krune, Ch. Mai, A. Peczek, D. Petousi, S. Simon, K. Voigt, G. Winzer, L. Zimmermann
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), 46 (2016)
(MOSAIC)

(44) BiCMOS Silicon Photonics Platform for Fabrication of High-Bandwidth Electronic-Photonic Integrated Circuits
D. Knoll, St. Lischke, A. Awny, M. Kroh, E. Krune, Ch. Mai, A. Peczek, D. Petousi, S. Simon, K. Voigt, G. Winzer, L. Zimmermann
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), 46 (2016)
(RF2THzSiSoC)

(45) BiCMOS Silicon Photonics Platform for Fabrication of High-Bandwidth Electronic-Photonic Integrated Circuits
D. Knoll, St. Lischke, A. Awny, M. Kroh, E. Krune, Ch. Mai, A. Peczek, D. Petousi, S. Simon, K. Voigt, G. Winzer, L. Zimmermann
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), 46 (2016)
(SASER)

(46) Lumped Modeling of Integrated MIM Capacitors for RF Applications
F. Korndörfer, V. Mühlhaus
Proc. 88th ARFTG Microwave Measurement Symposium, Power Amplifiers and Systems Design for Wireless Applications 2016, (2016)

(Design Kit)

(47) Investigation of Stoichiometry of Oxygen Precipitates in Czochralski Silicon Wafers by Means of EDX, EELS and FTIR Spectroscopy
D. Kot, G. Kissinger, M.A. Schubert, M. Klingsporn, A. Huber, A. Sattler
Superlattices and Microstructures 99, 231 (2016)
(Future Silicon Wafers)
In this work, we used EDX, EELS and FTIR spectroscopy to investigate the stoichiometry of
oxygen precipitates in Czochralski silicon wafers. The EDX analysis of a plate-like precipitate
demonstrated that the composition of the precipitate is SiO1.93. This result was
confirmed by EELS where the characteristic plasmon peak of SiO2 was observed. Additionally,
the absorption band of plate-like precipitates at 1223 cm-1 was found in the FTIR
spectrum measured at liquid helium temperature. It was demonstrated that this band can
only be simulated by the dielectric constants of amorphous SiO2.

(48) Current Stage of the Investigation of the Composition of Oxygen Precipitates in Czochralski Silicon Wafers
D. Kot, G. Kissinger, M.A. Schubert, A. Sattler
ECS Transactions 75(4), 53 (2016)
In this work, we look on the current stage of the investigation of the composition of
oxygen precipitates obtained with the help of different techniques. Moreover, we present
our recent and new investigation of the composition of oxygen precipitates carried out by
means of energy dispersive X-ray spectroscopy, electron energy loss spectroscopy, and
Fourier transform infrared spectroscopy. The FTIR spectra measured at liquid helium
temperature are compared with the spectra simulated on the basis of experimental results
obtained by scanning transmission electron microscopy. According to the results obtained
by all methods the precipitated phase of plate-like as well as octahedral precipitates is
close to SiO2.

(49) Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK
M. Kroh, A. Awny, G. Winzer, R. Nagulapalli, St. Lischke, D. Knoll, A. Peczek, D. Micusik, A.C. Ulusoy, D. Kissinger, L. Zimmermann, K. Petermann
Proc. 42nd European Conference on Optical Communication (ECOC 2016), 1157 (2016)
(BEACON)
A monolithic photonic-electronic direct detection single polarization linear receiver chip is presented. Electro-optical bandwidth and BER measurements reveal state-of-the-art performance of the integrated receiver.

(50) Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK
M. Kroh, A. Awny, G. Winzer, R. Nagulapalli, St. Lischke, D. Knoll, A. Peczek, D. Micusik, A.C. Ulusoy, D. Kissinger, L. Zimmermann, K. Petermann
Proc. 42nd European Conference on Optical Communication (ECOC 2016), 1157 (2016)
(SPEED)
A monolithic photonic-electronic direct detection single polarization linear receiver chip is presented. Electro-optical bandwidth and BER measurements reveal state-of-the-art performance of the integrated receiver.

(51) Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK
M. Kroh, A. Awny, G. Winzer, R. Nagulapalli, St. Lischke, D. Knoll, A. Peczek, D. Micusik, A.C. Ulusoy, D. Kissinger, L. Zimmermann, K. Petermann
Proc. 42nd European Conference on Optical Communication (ECOC 2016), 1157 (2016)
(SITOGA)
A monolithic photonic-electronic direct detection single polarization linear receiver chip is presented. Electro-optical bandwidth and BER measurements reveal state-of-the-art performance of the integrated receiver.

(52) Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK
M. Kroh, A. Awny, G. Winzer, R. Nagulapalli, St. Lischke, D. Knoll, A. Peczek, D. Micusik, A.C. Ulusoy, D. Kissinger, L. Zimmermann, K. Petermann
Proc. 42nd European Conference on Optical Communication (ECOC 2016), 1157 (2016)
(SFB787)
A monolithic photonic-electronic direct detection single polarization linear receiver chip is presented. Electro-optical bandwidth and BER measurements reveal state-of-the-art performance of the integrated receiver.

(53) Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK
M. Kroh, A. Awny, G. Winzer, R. Nagulapalli, St. Lischke, D. Knoll, A. Peczek, D. Micusik, A.C. Ulusoy, D. Kissinger, L. Zimmermann, K. Petermann
Proc. 42nd European Conference on Optical Communication (ECOC 2016), 1157 (2016)
(SASER)
A monolithic photonic-electronic direct detection single polarization linear receiver chip is presented. Electro-optical bandwidth and BER measurements reveal state-of-the-art performance of the integrated receiver.

(54) Comparison of the Jitter Performance of Different Photonic Sampling Techniques
E. Krune, B. Krueger, L. Zimmermann, K. Voigt, K. Petermann
IEEE Journal of Lightwave Technology 34, 1360 (2016)
(MOSAIC)
A generalized noise model is introduced suitable
for the performance analysis of photonic sampling. The jitter
characteristics of two principle sampling techniques are investigated. Depending on sampler architectures the sampling instant
is defined either by a time instant at the rising edge of the
detected pulses or by their center of gravity. Simple formulas
are derived for both cases capable to characterize the jitter
performance of numerous photonic analog-to-digital converter
(ADC) architectures. It is shown that using the center of gravity
of optical pulses for the sampling process is one magnitude more
precise than using a time instant at the rising edge. But a higher
timing precision of < 1 fs is accompanied by a higher amplitude
uncertainty which decreases the photonic ADC resolution to ≈ 9
effective number of bits (ENOB).

(55) Comparison of the Jitter Performance of Different Photonic Sampling Techniques
E. Krune, B. Krueger, L. Zimmermann, K. Voigt, K. Petermann
IEEE Journal of Lightwave Technology 34, 1360 (2016)
(SFB787)
A generalized noise model is introduced suitable
for the performance analysis of photonic sampling. The jitter
characteristics of two principle sampling techniques are investigated. Depending on sampler architectures the sampling instant
is defined either by a time instant at the rising edge of the
detected pulses or by their center of gravity. Simple formulas
are derived for both cases capable to characterize the jitter
performance of numerous photonic analog-to-digital converter
(ADC) architectures. It is shown that using the center of gravity
of optical pulses for the sampling process is one magnitude more
precise than using a time instant at the rising edge. But a higher
timing precision of < 1 fs is accompanied by a higher amplitude
uncertainty which decreases the photonic ADC resolution to ≈ 9
effective number of bits (ENOB).

(56) SiGe Applications in Automotive Radars
W. Liebl, J. Boeck, K. Aufinger, D. Manger, W. Hartner, B. Heinemann, R. Lachner
ECS Transactions 75(8), 91 (2016)
(Dotseven)
An overview of the SiGe technologies used at Infineon Technologies for radar applications will be given. The production of bare-die chips started in 2009 using the bipolar technology
B7HF200. Since 2012 packaged MMICs in an embedded wafer level ball grid array (eWLB) are available. Process challenges and solutions for radar chips in an eWLB package are presented.
Examples of commercial SiGe radar chips in production are shown.
Furthermore Infineon’s next generation BiCMOS technology
B11HFC with fT of 250 GHz and fmax of 370 GHz is described. In
addition, significant improvements of the cut-off frequencies can
be achieved by replacing the currently used double-poly selfaligned
configuration by a more advanced SiGe HBT architecture
like IHP’s transistor module with selective base link epitaxy. The
capability of this transistor cell for future BiCMOS generations
was demonstrated by integrating it into Infineon’s 130 nm CMOS
process. A transistor performance with fmax of 500 GHz was
achieved.

(57) Design Effects on the Performance of High-Speed Ge Photo Detectors
St. Lischke, D. Knoll, Ch. Mai, M. Kroh, D. Schmidt, A. Peczek, J. Kreißl, J.-M. Lee, M. Kim, W.-Y. Choi, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 22 (2016)
(SPEED)
We investigate design effects on the opto-electrical frequency response of waveguide-coupled, lateral Ge p-i-n photodiodes to estimate the sensitivity of this response to diode fabrication tolerances and, in particular, to improve our understanding how diffusion of photo carriers acts on the response behavior.

(58) Design Effects on the Performance of High-Speed Ge Photo Detectors
St. Lischke, D. Knoll, Ch. Mai, M. Kroh, D. Schmidt, A. Peczek, J. Kreißl, J.-M. Lee, M. Kim, W.-Y. Choi, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 22 (2016)
(DIMENSION)
We investigate design effects on the opto-electrical frequency response of waveguide-coupled, lateral Ge p-i-n photodiodes to estimate the sensitivity of this response to diode fabrication tolerances and, in particular, to improve our understanding how diffusion of photo carriers acts on the response behavior.

(59) Design Effects on the Performance of High-Speed Ge Photo Detectors
St. Lischke, D. Knoll, Ch. Mai, M. Kroh, D. Schmidt, A. Peczek, J. Kreißl, J.-M. Lee, M. Kim, W.-Y. Choi, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 22 (2016)
(PHRESCO)
We investigate design effects on the opto-electrical frequency response of waveguide-coupled, lateral Ge p-i-n photodiodes to estimate the sensitivity of this response to diode fabrication tolerances and, in particular, to improve our understanding how diffusion of photo carriers acts on the response behavior.

(60) Design Effects on the Performance of High-Speed Ge Photo Detectors
St. Lischke, D. Knoll, Ch. Mai, M. Kroh, D. Schmidt, A. Peczek, J. Kreißl, J.-M. Lee, M. Kim, W.-Y. Choi, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 22 (2016)
(BEACON)
We investigate design effects on the opto-electrical frequency response of waveguide-coupled, lateral Ge p-i-n photodiodes to estimate the sensitivity of this response to diode fabrication tolerances and, in particular, to improve our understanding how diffusion of photo carriers acts on the response behavior.

(61) Side-Use of a Ge p-i-n Photo Diode for Electrical Application in a Photonic BiCMOS Technology
St. Lischke, D. Knoll, S. Tolunay Wipf, Ch. Wipf, A. Fox, F. Herzel, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 126 (2016)
(SITOGA)

(62) Side-Use of a Ge p-i-n Photo Diode for Electrical Application in a Photonic BiCMOS Technology
St. Lischke, D. Knoll, S. Tolunay Wipf, Ch. Wipf, A. Fox, F. Herzel, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 126 (2016)
(SPEED)

(63) Side-Use of a Ge p-i-n Photo Diode for Electrical Application in a Photonic BiCMOS Technology
St. Lischke, D. Knoll, S. Tolunay Wipf, Ch. Wipf, A. Fox, F. Herzel, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 126 (2016)
(DIMENSION)

(64) Side-Use of a Ge p-i-n Photo Diode for Electrical Application in a Photonic BiCMOS Technology
St. Lischke, D. Knoll, S. Tolunay Wipf, Ch. Wipf, A. Fox, F. Herzel, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 126 (2016)
(PHRESCO)

(65) Side-Use of a Ge p-i-n Photo Diode for Electrical Application in a Photonic BiCMOS Technology
St. Lischke, D. Knoll, S. Tolunay Wipf, Ch. Wipf, A. Fox, F. Herzel, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2016), 126 (2016)
(BEACON)

(66) Photonic BiCMOS Technology – Enabler for Si-Based, Monolithically Integrated Transceivers Towards 400 G
St. Lischke, L. Zimmermann, P. Rito, A.C. Ulusoy, D. Petousi, I. Garcia Lopez, Ch. Mai, M. Kroh, B. Heinemann, H. Rücker, J. Katzer, M.A. Schubert, M. Kaynak, A. Mai
Proc. 46th European Microwave Conference (EuMC 2016), 1385 (2016)
(SPEED)
We present a photonic BiCMOS process enabling for monolithically integrated Si-based transceiver front-ends towards single-wavelength 400 Gb/s data rate by combining segmented Mach-Zehnder-Interferometer modulators and high-speed germanium photo detectors with high-performance electronics.

(67) Design Effects on the Performance of High-Speed Ge Photo Detectors
St. Lischke, D. Knoll, Ch. Mai, M. Kroh, D. Schmidt, A. Peczek, J. Kreißl, J.-M. Lee, M. Kim, W.-Y. Choi, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 22 (2016)
(SITOGA)
We investigate design effects on the opto-electrical frequency response of waveguide-coupled, lateral Ge p-i-n photodiodes to estimate the sensitivity of this response to diode fabrication tolerances and, in particular, to improve our understanding how diffusion of photo carriers acts on the response behavior.

(68) LVDS : A Rad-Hard Octal 500 Mbps Bus LVDS Repeater for Space
J. Lopez, E. Cordero, M. Cirillo, R. Dittrich, A. Frouin, R. Jansen, D. Lopez
Proc. 6th International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications (AMICSA 2016), 142 (2016)
(MPW)

(69) Graphene Synthesis and Processing on Ge Substrates
M. Lukosius, G. Lippert, J. Dabrowski, J. Kitzmann, T. Schroeder, M. Lisker, A. Krüger, O. Fursenko, Y. Yamamoto, A. Wolff, A. Mai, G. Lupina
ECS Transactions 75(8), 533 (2016)
(Graphen)
We review some of the recent results obtained on the graphene synthesis on Ge(100)/Si(100) substrates by molecular beam epitaxy and wafer scale chemical vapor deposition. We outline some of the identified challenges in synthesis and present first experimental results on patterning and in-line metrology of graphene in a 200 mm wafer pilot line.

(70) Metal-Free CVD Graphene Synthesis on 200 mm Ge/Si (100) Substrates
M. Lukosius, J. Dabrowski, M. Lisker, F. Akhtar, J. Kitzmann, S. Schulze, G. Lippert, O. Fursenko, Y. Yamamoto, M.A. Schubert, H.-M. Krause, A. Wolff, A. Mai, T. Schroeder, G. Lupina
ACS Applied Materials & Interfaces 8, 33786 (2016)
Good quality, complementary-metal-oxidesemiconductor (CMOS) technology compatible, 200 mm graphene was obtained on Ge(001)/Si(001) wafers in this work. Chemical vapor depositions were carried out at the deposition temperatures of 885 °C using CH4 as carbon source on epitaxial Ge(100) layers, which were grown on Si(100), prior to the graphene synthesis. Graphene layer with the 2D/G ratio ∼3 and low D mode (i.e., low concentration of defects) was measured over the entire 200 mm wafer by Raman spectroscopy. A typical full-width-at-half-maximum value of 39 cm−1 was extracted for the 2D mode, further indicating that graphene of good structural quality was produced. The study also revealed that the lack of interfacial oxide correlates with superior properties of graphene. In order to evaluate electrical properties of graphene, its 2 × 2 cm2 pieces were transferred onto SiO2/Si substrates from Ge/Si wafers. The extracted sheet resistance and mobility values of transferred graphene layers were ∼1500 ± 100 Ω/sq and μ ≈ 400 ± 20 cm2/V s, respectively. The transferred
graphene was free of metallic contaminations or mechanical damage. On the basis of results of DFT calculations, we attribute the high structural quality of graphene grown by CVD on Ge to hydrogen-induced reduction of nucleation probability, explain the appearance of graphene-induced facets on Ge(001) as a kinetic effect caused by surface step pinning at linear graphene nuclei, and clarify the orientation of graphene domains on Ge(001) as resulting from good lattice matching between Ge(001) and graphene nucleated on such nuclei.

(71) Investigation of Disilane-Based SiGe - HBT Layers for Low External Base Resistances
A. Mai, I. Costina, T. Lenke, Y. Yamamoto
ECS Transactions 75(8), 541 (2016)
In this work we study different SiGe epitaxial processes for the base realization of a heterojunction bipolar transistor. In particular, we investigate the poly SiGe layer of external base contact region. Silane (SiH4) and disilane (Si2H6) based precursors were used for a
chemical vapour deposition process of the Si/SiGe/Si layer stack. Sheet resistances of the poly SiGe layer as well as boron doping and germanium distribution before and after different rapid thermal annealing steps, which is used for HBT fabrication process after the epitaxy process, were analyzed. We show that for equal doping profiles in the single crystalline region and minor differences in the thickness of the poly SiGe region the use of a disilane based
precursor is beneficial for a reduced external base resistance. Sheet resistance measurements show a decrease by more than 60% with respect to the standard silane based SiGe layer.

(72) SiGe-BiCMOS based Technology Platforms for mm-Wave and Radar Applications
A. Mai, M. Kaynak
Proc. IEEE Microwave and Radar Week (MRW 2016), 1 (2016)
In this work we present different SiGe-BiCMOS based technology platforms for mm-wave and radar applications. Based on the evolution of IHP BiCMOS technologies we show the performance improvement for SiGe-heterojunction bipolar transistor (HBT) in the past decades in comparison to scaled RF-CMOS technologies. We depict that an increase of the processing effort of only 35% deliver a SiGe-HBT device performance improvement of >170%.  Moreover we review the co-integration of new modules with the SiGe-BiCMOS baseline technology. The monolithic integration of an additional RF-MEMS switch module is shown and we discuss different packaging approaches for the integrated device. Furthermore we present a SiGe-BiCMOS/InP-bipolar heterogeneous integration platform. All presented technologies  had proven their usefulness for radar applications and we review different examples from F-band up to the 240GHz range.

(73) Review - Multifunctional Technology with Monolithic Integrated THz-, Photonic- and µ-Fluidic Modules
A. Mai, St. Lischke, M. Wietstruck, L. Zimmermann, M. Kaynak, B. Tillack
ECS Journal of Solid State Science and Technology 5(6), Q160 (2016)

The purpose of this work is to review requirements and challenges for the monolithic integration of different devices and modules in a baseline CMOS-process with the intention to create a multifunctional technology platform. We consider integrated modules like THz devices, i.e. complementary SiGe heterojunction bipolar transistors, silicon photonics components in particular Ge-PIN photo detectors and the wafer-level integration of micro-fluidic channels for sensor applications. However, the monolithic integration of devices and modules for novel functionalities is still a trade-off. On the one side there are requirements of the integration concept and therefore to the process steps of the dedicated module to achieve a maximum device performance. On the other side there are influences of the process steps for the module integration to the performance of the devices from the underlying baseline technology like bipolar- and CMOS-transistors or passive components. Both aspects have to be considered to enable the co-integration of new modules in order to get a technology platform for high performances and novel functionalities.We review process adaptations of the
baseline technologies to enable an efficient co-integration of different modules. Moreover we discuss critical process steps with a certain thermal budget and their influence to device performances. Finally we give recommendations for process sequences to enable
a wafer level co-integration of microfluidic channels into a SiGe-BiCMOS technology platform.




(74) Review - Multifunctional Technology with Monolithic Integrated THz-, Photonic- and µ-Fluidic Modules
A. Mai, St. Lischke, M. Wietstruck, L. Zimmermann, M. Kaynak, B. Tillack
ECS Journal of Solid State Science and Technology 5(6), Q160 (2016)
The purpose of this work is to review requirements and challenges for the monolithic integration of different devices and modules in a baseline CMOS-process with the intention to create a multifunctional technology platform. We consider integrated modules like THz devices, i.e. complementary SiGe heterojunction bipolar transistors, silicon photonics components in particular Ge-PIN photo detectors and the wafer-level integration of micro-fluidic channels for sensor applications. However, the monolithic integration of
devices and modules for novel functionalities is still a trade-off. On the one side there are requirements of the integration concept and therefore to the process steps of the dedicated module to achieve a maximum device performance. On the other side there are influences of the process steps for the module integration to the performance of the devices from the underlying baseline technology like bipolar- and CMOS-transistors or passive components. Both aspects have to be considered to enable the co-integration of new modules in order to get a technology platform for high performances and novel functionalities.We review process adaptations of the baseline technologies to enable an efficient co-integration of different modules. Moreover we discuss critical process steps with a certain thermal budget and their influence to device performances. Finally we give recommendations for process sequences to enable a wafer level co-integration of microfluidic channels into a SiGe-BiCMOS technology platform.

(75) A 275 GHz Amplifier in 0.13 µm SiGe
S. Malz, P. Hillger, B. Heinemann, U.R. Pfeiffer
Proc. 11th European Microwave Integrated Circuits Conference (EuMIC 2016), 185 (2016)
(Dotseven)

(76) Silicon Photonics for 100 Gbit/s Intra-Data Center Optical Interconnects
St. Meister, M. Grehn, H. Rhee, M. Vitali, Ch. Theiss, S. Kupijai, A. Al-Saadi, D. Bronzi, S. Otte, M. Henniges, D. Selicke, M. Atif, E. Schwartz, St. Lischke, D. Stolarek, A. Mai, M. Kaynak, H.H. Richter, L. Zimmermann
Proc. SPIE, 9753, 975308, (2016)
(SPEED)

(77) Atomically Controlled Processing for Ge Epitaxial Growth
J. Murota, Y. Yamamoto, I. Costina, B. Tillack, V. Le Thanh, R. Loo, M. Caymax
Proc. 13th  IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2016), (2016)


(78) Atomically Controlled Processing for Si and Ge CVD Epitaxial Growth
J. Murota, Y. Yamamoto, I. Costina, B. Tillack, V. Le Thanh, R. Loo, M. Caymax
ECS Transactions 72(2), 71 (2016)
In this work, the segregation of dopants and surface roughness generation observed during in-situ doping and their suppression by applying an atomic layer doping approach are presented. The impurity segregations are explained by the Langmuir-type adsorption and reaction scheme. Results of nm-order thick Ge epitaxial growth on Si(100) using an ultraclean low-pressure CVD system are obtained. Degradation for epitaxial growth of Si and Ge is induced by the existence of Ge oxide in the CVD reactor. It is suggested that the evaporated Ge oxide is adsorbed on the Si surface and the Ge oxide is reduced to the pure Ge by the Si in accordance with Si oxide formation and that the Ge oxide evaporation is suppressed by SiH4 treatment.  These results demonstrate the capability of CVD technology for atomically controlled processing of Si, Si1-xGex and Ge for ultra large scale integration.

(79) EI4GroupIV: Excellence Initiative for New Group IV Semiconductor Materials & Processing
J. Murota, R. Loo, B. Tillack, V. Le Thanh, S. Chiussi, M. Hirayama, M. Niwano
Proc. INC12, abstr. book, 8 (2016)

(80) Dopant Segregation in Si and Ge CVD Epitaxial Growth
J. Murota, Y. Yamamoto, I. Costina, B. Tillack, V. Le Thanh, R. Loo, M. Caymax
Proc. 8th International Workshop on Advanced Materials Science and Nanotechnology, abstr. book, 33 (2016)

(81) Photodetection in Hybrid Single Layer Graphene/fully Coherent Ge Island Nanostructures Selectively Grown on Si Nano-tip Patterns
G. Niu, G. Capellini, G. Lupina, T. Niermann, M. Salvalaglio, A. Marzegalli, M.A. Schubert, P. Zaumseil, H.-M. Krause, O. Skibitzki, M. Lehmann, F. Montalenti, Y.-H. Xie, T. Schroeder
ACS Applied Materials & Interfaces 8(3), 2017 (2016)
Dislocation networks are one of the most principle sources deteriorating the performances of devices based on lattice-mismatched heteroepitaxial systems. We demonstrate here a technique enabling fully coherent germanium (Ge) islands selectively grown on nanotippatterned
Si(001) substrates. The silicon (Si)-tip-patterned substrate, fabricated by complementary metal oxide semiconductor compatible nanotechnology, features ∼50-nm-wide Si areas emerging from a SiO2 matrix and arranged in an ordered lattice. Molecular beam epitaxy growths result in Ge
nanoislands with high selectivity and having homogeneous shape and size. The ∼850 °C growth temperature required for ensuring selective growth has been shown to lead to the formation
of Ge islands of high crystalline quality without extensive Si intermixing (with 91 atom % Ge). Nanotip-patterned wafers result in geometric, kinetic-diffusion-barrier intermixing hindrance, confining the major intermixing to the pedestal region of Ge islands, where kinetic diffusion barriers are, however, high. Theoretical calculations suggest that the thin Si/Ge layer at the interface plays, nevertheless, a significant role in realizing our fully coherent Ge nanoislands free from extended defects especially dislocations. Single-layer graphene/Ge/Si-tip Schottky junctions were fabricated, and thanks to the absence of extended defects in Ge islands, they demonstrate high-performance photodetection characteristics with responsivity of ∼45 mA W-1 and an Ion/Ioff ratio of ∼103.

(82) Dislocation-free Ge Nano-Crystals on Si: Pattern Independent Selective Ge Heteroepitaxy via Si-tip Wafers
G. Niu, G. Capellini, M.A. Schubert, T. Niermann, P. Zaumseil, J. Katzer, H.-M. Krause, O. Skibitzki, M. Lehmann, Y.-H. Xie, H. von Känel, T. Schroeder
Scientific Reports 6, 22709 (2016)
The integration of dislocation-free Ge nano-islands was realized via selective molecular beam epitaxy on Si nano-tip patterned substrates. The Si-tip wafers feature a rectangular array of nanometer sized Si tips with (001) facet exposed among a SiO2 matrix. These wafers were fabricated by complementary metaloxide-semiconductor (CMOS) compatible nanotechnology. Calculations based on nucleation theory predict that the selective growth occurs close to thermodynamic equilibrium, where condensation of Ge adatoms on SiO2 is disfavored due to the extremely short re-evaporation time and diffusion length. The growth selectivity is ensured by the desorption-limited growth regime leading to the observed pattern independence, i.e. the absence of loading effect commonly encountered in chemical vapor deposition. The growth condition of high temperature and low deposition rate is responsible for the observed high crystalline quality of the Ge islands which is also associated with negligible Si-Ge intermixing owing to geometric hindrance by the Si nano-tip approach. Single island as well as area-averaged characterization methods demonstrate that Ge islands are dislocation-free and heteroepitaxial strain
is fully relaxed. Such well-ordered high quality Ge islands present a step towards the achievement of materials suitable for optical applications.

(83) Hybrid Graphene/Dislocation-free Ge Islands Selectively Grown on Si Nano-Tip Patterns for High Performance Photodetection
G. Niu, G. Capellini, G. Lupina, T. Niermann, M. Salvalaglio, A. Marzegalli, M.A. Schubert, P. Zaumseil, H.-M. Krause, O. Skibitzki, V. Schlykow, M. Lehmann, F. Montalenti, Y.-H. Xie, T. Schroeder
Proc. International SiGe Technology and Device Meeting (ISTDM 2016), abstr. 147 (2016)

(84) Material Insights of HfO2-based Integrated 1-Transistor-1-Resistor Random Resistive Access Memory Devices Processed by Batch Atomic Layer Deposition
G. Niu, H.-D. Kim, R. Roelofs, E. Perez, M.A. Schubert, P. Zaumseil, I. Costina, Ch. Wenger
Scientific Reports 6, 28155 (2016)
(Panache)
With the continuous scaling of resistive random access memory (RRAM) devices, in-depth
understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the  nano-crystallites density in the film increases the forming voltage of devices and its variation.
Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.

(85) Material Insights of HfO2-based Integrated 1-Transistor-1-Resistor Random Resistive Access Memory Devices Processed by Batch Atomic Layer Deposition
G. Niu, H.-D. Kim, R. Roelofs, E. Perez, M.A. Schubert, P. Zaumseil, I. Costina, Ch. Wenger
Scientific Reports 6, 28155 (2016)
(RRAM (Resistive RAM))
With the continuous scaling of resistive random access memory (RRAM) devices, in-depth
understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the  nano-crystallites density in the film increases the forming voltage of devices and its variation.
Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.

(86) Geometric Conductive Filament Confinement by Nanotips for Resistive Switching of HfO2-RRAM Devices with High Performance
G. Niu, P. Calka, M. Auf der Maur, F. Santoni, S. Guha, M. Fraschke, P. Hamoumou, B. Gautier, E. Perez, Ch. Walczyk, Ch. Wenger, A. Di Carlo, L. Alff, T. Schroeder
Scientific Reports 6, 25757 (2016)
Filament-type HfO2-based RRAM has been considered as one of the most promising candidates for future non-volatile memories. Further improvement of the stability, particularly at the “OFF” state, of such devices is mainly hindered by resistance variation induced by the uncontrolled oxygen vacancies distribution and filament growth in HfO2 films. We report highly stable endurance of TiN/Ti/HfO2/Sitip RRAM devices using a CMOS compatible nanotip method. Simulations indicate that the nanotip bottom electrode provides a local confinement for the electrical field and ionic current density; thus a nano-confinement for the oxygen vacancy distribution and nano-filament location is created by this approach. Conductive atomic force microscopy measurements confirm that the filaments form only on the nanotip region. Resistance switching by using pulses shows highly stable endurance for both ON and OFF modes, thanks to the geometric confinement of the conductive path and filament only
above the nanotip. This nano-engineering approach opens a new pathway to realize forming-free RRAM devices with improved stability and reliability.

(87) Selective Epitaxy of InP on Si and Rectification in Graphene/InP/Si Hybrid Structure
G. Niu, G. Capellini, F. Hatami, A. Di Bartolomeo, T. Niermann, E.H. Hussein, M.A. Schubert, H.-M. Krause, P. Zaumseil, O. Skibitzki, G. Lupina, W.T. Masselink, M. Lehmann, Y.-H. Xie, T. Schroeder
ACS Applied Materials & Interfaces 8, 26948 (2016)
The epitaxial integration of highly heterogeneous material systems with silicon (Si) is a central topic in (opto-)electronics owing to device applications. InP could open new avenues for the realization of novel devices such as high-mobility transistors in next-generation CMOS or efficient lasers in Si photonics circuitry. However, the InP/Si heteroepitaxy is highly challenging
due to the lattice (∼8%), thermal expansion mismatch (∼84%), and the different lattice symmetries. Here, we demonstrate the growth of InP nanocrystals showing high structural quality and excellent optoelectronic properties on Si. Our CMOS-compatible innovative approach exploits the selective epitaxy of InP nanocrystals on Si nanometric seeds obtained by the opening of lattice-arranged Si nanotips embedded in a SiO2 matrix. A graphene/InP/Si-tip heterostructure was realized on obtained materials, revealing rectifying behavior and promising photodetection. This work presents a significant advance toward the monolithic integration of graphene/III−V based hybrid devices onto the mainstream Si technology platform.

(88) A Wideband High Isolation CMOS T/R Switch for X-Band Phased Array Radar Systems
E. Özeren, A.C. Ulku, I. Kalyoncu, C. Caliskan, M. Davulcu, M. Kaynak, Y. Gurbuz
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), 67 (2016)
(IHP-Sabanci Joint Lab)

(89) BiCMOS Microfluidic Sensor for Single Cell Label-Free Monitoring Through Microwave Intermodulation
C. Palego, G. Perry, F. Hjeij, C. Dalmay, A. Bessaudou, B. Blondy, A. Pothier, F. Lalloue, B. Bessette, M.-O. Jauberteau, C. Baristiran Kaynak, M. Wietstruck, M. Kaynak, M. Casbon, J. Benedikt, D. Barrow, A. Porch
Proc. IEEE MTT-S International Microwave Symposium (IMS 2016), (2016)
(Microfluidics)

(90) Electrical Study of Radiation Hard Designed HfO2-Based 1T-1R RRAM Devices
E. Perez, F. Teply, Ch. Wenger
Proc. MRS Fall Meeting & Exhibit 2016, (2016)
(Panache)

(91) Electrical Study of Radiation Hard Designed HfO2-Based 1T-1R RRAM Devices
E. Perez, F. Teply, Ch. Wenger
Proc. MRS Fall Meeting & Exhibit 2016, (2016)
(R2RAM)

(92) Monolithically Integrated High-Extinction-Ratio MZM with a Segmented Driver in Photonic BiCMOS
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, R. Barth, Ch. Mai, I. Garcia-Lopez, A.C. Ulusoy, A. Peczek, G. Winzer, K. Voigt, K. Petermann
IEEE Photonics Technology Letters 28(24), 2866 (2016)

(93) Monolithic Photonic BiCMOS Sub-System Comprising MZM and Segmented Driver with 13 dB ER at 28 Gb/s
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, Ch. Mai, I. Garcia Lopez, A.C. Ulusoy, G. Winzer, K. Voigt, Klaus Petermann
Proc. Conference on Lasers and Electro-Optics (CLEO), STu4G.3 (2016)
(BEACON)
In this work, a monolithically integrated Si depletion-type Mach-Zehnder modulator with linear segmented driver is demonstrated. Electro-optic time-domain measurements show extinction ratio more than 13 dB at 28 Gb/s with 700 mVpp.

(94) Monolithic Photonic BiCMOS Sub-System Comprising MZM and Segmented Driver with 13 dB ER at 28 Gb/s
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, Ch. Mai, I. Garcia Lopez, A.C. Ulusoy, G. Winzer, K. Voigt, Klaus Petermann
Proc. Conference on Lasers and Electro-Optics (CLEO), STu4G.3 (2016)
(SITOGA)
In this work, a monolithically integrated Si depletion-type Mach-Zehnder modulator with linear segmented driver is demonstrated. Electro-optic time-domain measurements show extinction ratio more than 13 dB at 28 Gb/s with 700 mVpp.

(95) Monolithic Photonic BiCMOS Sub-System Comprising MZM and Segmented Driver with 13 dB ER at 28 Gb/s
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, Ch. Mai, I. Garcia Lopez, A.C. Ulusoy, G. Winzer, K. Voigt, Klaus Petermann
Proc. Conference on Lasers and Electro-Optics (CLEO), STu4G.3 (2016)
(SFB787)
In this work, a monolithically integrated Si depletion-type Mach-Zehnder modulator with linear segmented driver is demonstrated. Electro-optic time-domain measurements show extinction ratio more than 13 dB at 28 Gb/s with 700 mVpp.

(96) Monolithic Photonic BiCMOS Sub-System Comprising MZM and Segmented Driver with 13 dB ER at 28 Gb/s
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, Ch. Mai, I. Garcia Lopez, A.C. Ulusoy, G. Winzer, K. Voigt, Klaus Petermann
Proc. Conference on Lasers and Electro-Optics (CLEO), STu4G.3 (2016)
(SASER)
In this work, a monolithically integrated Si depletion-type Mach-Zehnder modulator with linear segmented driver is demonstrated. Electro-optic time-domain measurements show extinction ratio more than 13 dB at 28 Gb/s with 700 mVpp.

(97) Monolithic Photonic BiCMOS Sub-System Comprising MZM and Segmented Driver with 13 dB ER at 28 Gb/s
D. Petousi, L. Zimmermann, P. Rito, M. Kroh, D. Knoll, St. Lischke, Ch. Mai, I. Garcia Lopez, A.C. Ulusoy, G. Winzer, K. Voigt, Klaus Petermann
Proc. Conference on Lasers and Electro-Optics (CLEO), STu4G.3 (2016)
(SPEED)
In this work, a monolithically integrated Si depletion-type Mach-Zehnder modulator with linear segmented driver is demonstrated. Electro-optic time-domain measurements show extinction ratio more than 13 dB at 28 Gb/s with 700 mVpp.

(98) High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform 
D. Petousi, I. Garcia Lopez, St. Lischke, D. Knoll, P. Rito, M. Kroh, Ch. Mai, A.C. Ulusoy, K. Voigt, L. Zimmermann, K. Petermann
Proc. European Conference on Optical Communication (ECOC 2016), 604 (2016)
(SASER)
Monolithically integrated transmitters in 0.25 μm photonic BiCMOS platform with two different driver approaches are discussed: a linear and a more power efficient topology featuring integrated 4-bit DAC. From the latter, PAM-4 eye diagrams up to 40 Gb/s are demonstrated.

(99) High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform 
D. Petousi, I. Garcia Lopez, St. Lischke, D. Knoll, P. Rito, M. Kroh, Ch. Mai, A.C. Ulusoy, K. Voigt, L. Zimmermann, K. Petermann
Proc. European Conference on Optical Communication (ECOC 2016), 604 (2016)
(SFB787)
Monolithically integrated transmitters in 0.25 μm photonic BiCMOS platform with two different driver approaches are discussed: a linear and a more power efficient topology featuring integrated 4-bit DAC. From the latter, PAM-4 eye diagrams up to 40 Gb/s are demonstrated.

(100) High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform 
D. Petousi, I. Garcia Lopez, St. Lischke, D. Knoll, P. Rito, M. Kroh, Ch. Mai, A.C. Ulusoy, K. Voigt, L. Zimmermann, K. Petermann
Proc. European Conference on Optical Communication (ECOC 2016), 604 (2016)
(SITOGA)
Monolithically integrated transmitters in 0.25 μm photonic BiCMOS platform with two different driver approaches are discussed: a linear and a more power efficient topology featuring integrated 4-bit DAC. From the latter, PAM-4 eye diagrams up to 40 Gb/s are demonstrated.

(101) High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform 
D. Petousi, I. Garcia Lopez, St. Lischke, D. Knoll, P. Rito, M. Kroh, Ch. Mai, A.C. Ulusoy, K. Voigt, L. Zimmermann, K. Petermann
Proc. European Conference on Optical Communication (ECOC 2016), 604 (2016)
(SPEED)
Monolithically integrated transmitters in 0.25 μm photonic BiCMOS platform with two different driver approaches are discussed: a linear and a more power efficient topology featuring integrated 4-bit DAC. From the latter, PAM-4 eye diagrams up to 40 Gb/s are demonstrated.

(102) High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform 
D. Petousi, I. Garcia Lopez, St. Lischke, D. Knoll, P. Rito, M. Kroh, Ch. Mai, A.C. Ulusoy, K. Voigt, L. Zimmermann, K. Petermann
Proc. European Conference on Optical Communication (ECOC 2016), 604 (2016)
(BEACON)
Monolithically integrated transmitters in 0.25 μm photonic BiCMOS platform with two different driver approaches are discussed: a linear and a more power efficient topology featuring integrated 4-bit DAC. From the latter, PAM-4 eye diagrams up to 40 Gb/s are demonstrated.

(103) Approaches to Enhance the Performance of SiGe Imagers Operating near 130 GHz and 300 GHz
J.-S. Rieh, D. Yoon, J. Kim, K. Song, M. Kaynak, B. Tillack
Proc. IEEE International Symposium on Radio-Frequency Integration Technology (RFIT 2016), (2016)

(104) A Monolithically Integrated Segmented Driver and Modulator in 0.25 μm SiGe:C BiCMOS with 13 dB Extinction Ratio at 28 Gb/s
P. Rito, I. Garcia Lopez, D. Petousi, L. Zimmermann, M. Kroh, St. Lischke, D. Knoll, D. Kissinger, A.C. Ulusoy
Proc. IEEE MTT-S International Microwave Symposium (IMS 2016), (2016)
(SASER)
In this work, a monolithically integrated segmented driver and Mach-Zehnder modulator (MZM) in 0.25 μm SiGe:C BiCMOS technology is presented. The driver and the modulator are divided in 16 segments and the MZM has a total length of 6.08 mm. The driver has a maximum gain of 14.5 dB. Electro-optical time-domain measurements were performed and an optical eye-diagram with more than 13 dB of extinction ratio at 28 Gb/s is demonstrated. The driver dissipates a total of 2 W of DC power. To the best knowledge of the authors, the presented work shows the highest extinction ratio achieved at 28 Gb/s in silicon modulators.

(105) A Monolithically Integrated Segmented Linear Driver and Modulator in EPIC 0.25 μm SiGe:C BiCMOS Platform
P. Rito, I. García López, D. Petousi, L. Zimmermann, M. Kroh, St. Lischke, D. Knoll, D. Micusik, A. Awny, A.C. Ulusoy, D. Kissinger
IEEE Transactions on Microwave Theory and Techniques 64(12), 4561 (2016)

(SASER)
In this work, a monolithically integrated segmented linear driver and Mach-Zehnder modulator (MZM) is presented. The transmitter is fabricated in electronic-photonic integrated circuit (EPIC) 0.25μm SiGe:C BiCMOS technology, with fT/fmax=190 GHz. The driver and the modulator are divided into 16 segments and the MZM phase shifter has a total length of 6.08 mm. The segmented driver delivers a maximum of 4 Vpp differentially, featuring a gain of 13 dB and THD below 5%. Electro-optical time-domain measurements using PAM-4 modulation format are performed, demonstrating optical eye-diagrams up to 25 Gbaud. The electro-optical bandwidth of the transmitter is 18 GHz. The power dissipation of the driver is 1.5W, resulting in an energy per bit of 30 pJ/bit at 50 Gb/s. The reported optical transmitter demonstrates for the first time an implementation of a linear driver integrated with a MZM in a Si monolithic process.

(106) A Monolithically Integrated Segmented Linear Driver and Modulator in EPIC 0.25 μm SiGe:C BiCMOS Platform
P. Rito, I. García López, D. Petousi, L. Zimmermann, M. Kroh, St. Lischke, D. Knoll, D. Micusik, A. Awny, A.C. Ulusoy, D. Kissinger
IEEE Transactions on Microwave Theory and Techniques 64(12), 4561 (2016)

(SPEED)
In this work, a monolithically integrated segmented linear driver and Mach-Zehnder modulator (MZM) is presented. The transmitter is fabricated in electronic-photonic integrated circuit (EPIC) 0.25μm SiGe:C BiCMOS technology, with fT/fmax=190 GHz. The driver and the modulator are divided into 16 segments and the MZM phase shifter has a total length of 6.08 mm. The segmented driver delivers a maximum of 4 Vpp differentially, featuring a gain of 13 dB and THD below 5%. Electro-optical time-domain measurements using PAM-4 modulation format are performed, demonstrating optical eye-diagrams up to 25 Gbaud. The electro-optical bandwidth of the transmitter is 18 GHz. The power dissipation of the driver is 1.5W, resulting in an energy per bit of 30 pJ/bit at 50 Gb/s. The reported optical transmitter demonstrates for the first time an implementation of a linear driver integrated with a MZM in a Si monolithic process.

(107) A Compact Millimeter-Wave Dual-Mode Ring Filter using Loaded Capacitances in CMOS 0.25 µm Technology
P. Rynkiewicz, A.-L. Franc, F. Coccetti, M. Wietstruck, M. Kaynak, G. Prigent
Proc. IEEE MTT-S International Microwave Symposium (IMS), (2016)

(108) QPSK Phase-Regeneration in a Silicon Waveguide Using Phase-Sensitive Processing
I. Sackey, E. Liebig, T. Richter, A. Gajda, L. Zimmermann, K. Petermann, C. Schubert
Proc. European Conference on Optical Communication (ECOC 2016), 659 (2016)
We present an in-line 4-level phase-regenerator which utilizes phase-sensitive amplification in a silicon waveguide with reverse-biased p-i-n junction. Phase noise reduction is investigated for a QPSK signal in a 1,040-km dispersion-managed link.

(109) Electrical Switching in Hybrid VO2/Si Photonic Structures
L.D. Sánchez, A. Rosa, T. Angelova, J. Hurtado, A. Griol, P. Sanchis, M. Menghini, P. Homm, B. van Bilzen, J.-P. Locquet, L. Zimmermann
Proc. 18th International Conference on Transparent Optical Networks (ICTON 2016), Tu.D5.4 (2016)
(SITOGA)
The integration of active materials on silicon is emerging as a promising field in silicon photonics to improve the performance metrics of key photonic components, in particular active components. Active materials allow tuning their optical properties as function of external stimuli. Amongst them, vanadium dioxide (VO2) has been largely investigated for different applications due to its controllable change between an insulating and a metallic phase. For photonic applications, VO2 shows a promising performance due to the abrupt change in the refractive index between the two phases across the semiconductor to metal transition (SMT). In this work, we will present our recent results for enabling disruptive electrical switching performance in hybrid VO2/Si photonic structures. Results have been obtained in the framework of the FP7-ICT-2013-11 -61456 SITOGA project

(110) A Wideband Fully Integrated SiGe Chipset for High Data Rate Communication at 240 GHz
N. Sarmah, P.R. Vazquez, J. Grzyb, W. Foerster, B. Heinemann, U.R. Pfeiffer
Proc. 11th European Microwave Integrated Circuits Conference (EuMIC 2016), 181 (2016)
(Dotseven)

(111) A Fully Integrated 240-GHz Direct-Conversion Quadrature Transmitter and Receiver Chipset in SiGe Technology
N. Sarmah, J. Grzyb, K. Statnikov, S. Malz, P.R. Vazquez, W. Foerster, B. Heinemann, U.R. Pfeiffer
IEEE Transactions on Microwave Theory and Techniques 64(2), 562 (2016)
(Dotseven)
This paper presents a fully integrated direct-conversion quadrature transmitter and receiver chipset at 240 GHz. It is implemented in a 0.13- µm SiGe bipolar-CMOS technology. A wideband frequency multiplier ( 16) based local-oscillator (LO) signal source and a wideband on-chip antenna designed to be used with an external replaceable silicon lens makes this
chipset suited for applications requiring fixed and tunable LO. The chipset is packaged in a low-cost FR4 printed circuit board resulting in a complete solution with compact form-factor. At
236 GHz, the effective-isotropic-radiated-power is 21.86 dBm and the minimum single-sideband noise figure is 15 dB. The usable RF bandwidth for this chipset is 65 GHz and the 6-dB bandwidth is 17 GHz. At the system level, we demonstrate a high data-rate communication system where an external modem is operated in its two IF-bandwidth modes (250 MHz and 1 GHz). For the quadrature phase-shift keying modulation scheme, the measured data rate is 2.73 Gb/s (modem 1-GHz IF) with bit-error rate of 10 for a 15-9cm link. The estimated data rate over the 17-GHz RF bandwidth is, hence, 23.025 Gb/s. Also, higher order modulation schemes like 16 quadrature amplitude modulation (QAM) with a data rate of 0.677 Gb/s and 64-QAM with a data rate of 1.0154 Gb/s (modem 250-MHz IF) is demonstrated. A second application demonstrator is presented where the wide tunable RF bandwidth of the chipset is used for material characterization. It is used to characterize an FR4 material (DE104) over the 215–260-GHz range.

(112) Diffusion Suppression of Delta Doped Phosphorus in Germanium by Implantation of Nitrogen
A. Scheit, T. Lenke, Y. Yamamoto
Proc. 21st International Conference on Ion Implantation Technology, abstr. book (2016)

(113) Dehalogenase-Covered Metal Surfaces as Platform Technology for Biosensors for Halogenated Organic Compounds
C.J. Schipp, T.G. Ab Alun Harris, Y. Ma, P. Durkin, M. Birkholz, L. Adrian, I. Zebger, A. Fischer, N. Budisa
Proc. Engineering of Functional Interfaces (EnFi Meeting 2016), abstr. book (2016)
(Bioelectronics)
Low-cost biosensors for the measurement of contaminations of water with halogenated compounds are not available at the market as there is no electrobiochemical method for the degradation of persistent organic halogen compounds established. With covalently binding of demonstrator compounds on metal surfaces we show the first steps of the development of an enzymatic sensor system as platform technology for electrobiochemical processes based on synthetic biology methods and click chemistry coupling.

(114) Selective Growth of Fully Relaxed GeSn Nano Islands on Patterned Si(001) by High Temperature Growth
V. Schlykow, N. Taoka, M.H. Zoellner, O. Skibitzki, P. Zaumseil, G. Capellini, Y. Yamamoto, T. Schroeder, G. Niu
Proc. International SiGe Technology and Device Meeting (ISTDM 2016), abstr., 92 (2016)

(115) The EU DOTSEVEN Project: Overview and Results
M. Schröter, J. Boeck, V. d’Alessandro, S. Fregonese, B. Heinemann, C. Jungemann, W. Liang, H. Kamrani, A. Mukherjee, A. Pawlak, U. Pfeiffer, N. Rinaldi, N. Sarmah, T. Zimmer
Proc. IEEE Compound Semiconductor IC Symposium (CSICS 2016), 2 (2016)
(Dotseven)

(116) 77 GHz 4-Element Phased-Array Radar Receiver Front End
M. SeyyedEsfahlan, E. Ozturk, M. Kaynak, I. Tekin
IEEE Transactions on Components, Packaging and Manufacturing Technology 6(8), 1162 (2016)
A phased-array receiver module operating at 77 GHz is designed and manufactured to obtain beam-steering capability. The module has four patch antennas integrated with three active phase shifter (APS) chips on a single-layer Rogers 3003 printed circuit board PCB board. The W-band 1.65-mm2 novel APS chip is fabricated using 0.13-μm SiGe Heterojunction Bipolar Transistor (HBT) technology. The APS consumes 100-mW dc power and achieves a peak gain of 9 dB at W-band and covers 360°. The phase shifter chips and PCB are packaged using low-cost wire-bond interconnections with insertion loss less than 7.5 dB. A novel method that exploits Klopfenstein tapering is also designed to connect coplanar waveguide to microstrip line with minimum insertion loss around 77 GHz. The measured gains of the phased-array receiver and passive four-element antenna array are compared. The module and passive array achieve the maximum gains of 9.7 and 10.4 dBi at 77 GHz. The simulated and measured results present well agreement at the W-band frequency. The beam can be steered to ±30°.

(117) Design of Monocrystalline Si/SiGe Multi-Quantum Well Microbolometer Detector for Infrared Imaging Systems
A. Shafique, E.C. Durmaz, B. Cetindogan, M. Yazici, M. Kaynak, C. Baristiran Kaynak, Y. Gurbuz
SPIE Proceedings, 9819, 89191T (2016)

(118) Parametric Characterization of Self-Heating in Depletion-Type Si Micro-Ring Modulators
M.J. Shin, Y. Ban, B.-M. Yu, J. Rhim, L. Zimmermann, W.-Y. Choi
IEEE Journal of Selected Topics in Quantum Electronics 22 (6), 3400207 (2016)
(PHRESCO)
The influence of self-heating on the static transmission characteristics of depletion-type Si micro-ring modulators (MRMs) is investigated. Self-heating, caused by free-carrier absorption of the input light inside the doped ring waveguide, increases the effective refractive index of the ring waveguide and results in the red-shifted resonance wavelength. This phenomenon
is modeled based on the coupled-mode equation with a newlyintroduced self-heating coefficient R. The accuracy of our model is confirmed by measurement. In addition, dependence of R on device size and doping concentration is experimentally investigated and
the resulting dependence is explained.

(119) Parametric Characterization of Self-Heating in Depletion-Type Si Micro-Ring Modulators
M.J. Shin, Y. Ban, B.-M. Yu, J. Rhim, L. Zimmermann, W.-Y. Choi
IEEE Journal of Selected Topics in Quantum Electronics 22 (6), 3400207 (2016)
(SPEED)
The influence of self-heating on the static transmission characteristics of depletion-type Si micro-ring modulators (MRMs) is investigated. Self-heating, caused by free-carrier absorption of the input light inside the doped ring waveguide, increases the effective refractive index of the ring waveguide and results in the red-shifted resonance wavelength. This phenomenon
is modeled based on the coupled-mode equation with a newlyintroduced self-heating coefficient R. The accuracy of our model is confirmed by measurement. In addition, dependence of R on device size and doping concentration is experimentally investigated and
the resulting dependence is explained.

(120) Parametric Characterization of Self­Heating in Si Micro-Ring Modulators
M.J. Shin, B.-M. Yu, L. Zimmermann, W.-Y.Choi
Proc. IEEE International Conference on Group IV Photonics (GFP 2016), 66 (2016)
(Photonics)
Influence of self-heating on Si-mircro-ring modulator (MRM) characteristics is modeled by adding a newly introduced self-heating coefficient to the existing coupled-mode model. With this, Si MRM transmission spectra and modulation frequency responses are accurately modeled for different input optical powers producing different amounts of self-heating.

(121) Ge Virtual Substrate Growth on Micrometer-Scaled Si Pillars by RPCVD
O. Skibitzki, G. Capellini, F. Montalenti, M.R. Barget, A. Marzegalli, P. Zaumseil, Y. Yamamoto, M.A. Schubert, F. Pezzoli, E. Bonera, A. Scaccabarozzi, R. Bergamaschini, M. Salvalaglio, T. Schroeder, L. Miglio
Proc. 8th International SiGe Technology and Device Meeting (ISTDM 2016), abstr., 133 (2016)

(122) Reduced-Pressure Chemical Vapor Deposition Growth of Isolated Ge Crystals and Suspended Layers on Micrometric Si Pillars
O. Skibitzki, G. Capellini, Y. Yamamoto, P. Zaumseil, M.A. Schubert, T. Schroeder, A. Ballabio, R. Bergamaschini, M. Salvalaglio, L. Miglio, F. Montalenti
ACS Applied Materials & Interfaces 8, 26374 (2016)
(DFG-DACh)
In this work, we demonstrate the growth of Ge crystals and suspended continuous layers on Si(001) substrates deeply patterned in high aspect-ratio pillars. The material deposition was carried out in a commercial reduced-pressure chemical vapor deposition (RPCVD) reactor, thus extending the “vertical-heteroepitaxy” technique developed by using the peculiar Low-energy plasma-enhanced chemical vapor deposition reactor (LEPECVD), to widely available epitaxial tools. The growth process was thoroughly analyzed, from the formation of small initial seeds to the final coalescence into a continuous suspended layer, by means of Scanning- and Transmission electron microscopy, x-ray diffraction, and -Raman spectroscopy. The pre-oxidation of the Si pillars sidewalls and the addition of hydrochloric gas in the reactants proved to be key to achieve highly selective Ge growth on the pillars top only, which, in turn, is needed to promote the formation of a continuous Ge layer.
Thanks to continuum growth models we were able to single out the different roles played by thermodynamics and kinetics in the deposition dynamics.
We believe that our findings will open the way to the low-cost realization of tens of µm thick heteroepitaxial layer (e.g. Ge, SiC, GaAs) on Si having high crystal quality.

(123) Junction Isolated MOS/LDMOS Cascode Arrangement for Radiation Tolerant RF-Power Applications
R. Sorge, J. Schmidt, F. Reimer, Ch. Wipf, R. Pliquett, R. Barth
Proc. European Conference on Radiation and its Effects on Components and Systems (RADECS 2016), (2016)
(LDMOS)

(124) Partially Slotted Silicon Ring Resonator Covered with Electro-Optical Polymer
P. Steglich, Ch. Mai, D. Stolarek, St. Lischke, S. Kupijai, C. Villringer, S. Pulwer, F. Heinrich, J. Bauer, St. Meister, D. Knoll, M. Casalboni, S. Schrader
Proc. SPIE Photonics Europe 2016, 210 (2016)

(125) Silicon Dual-Ring Resonator-Based Push-Pull Modulators
X. Sun, L. Zhou, M. Jäger, D.Petousi, L. Zimmermann, K. Petermann
Proc. of SPIE, 9752, 975208-1 (2016)
(SPEED)
Two types of silicon dual-ring resonator-based high-speed optical modulators are proposed. With two microring resonators cascaded either in series or in parallel, the transmission spectrum evolves from a deep notch to a sharp peak with the resonators operating in a push-pull manner. The frequency chirp of the modulated signals can be highly
suppressed by choosing a proper working wavelength.

(126) Electrical and Optical Properties Improvement of GeSn Layers Formed at High Temperature under Well-Controlled Sn Migration
N. Taoka, G. Capellini, V. Schlykow, M. Montanari, P. Zaumseil, O. Nakatsuka, S. Zaima, T. Schroeder
Proc. International Symposium on Control of Semiconductor Interfaces (ISCSI 2016) abstr., 96 (2016)
(Ge Laser)

(127) Thin Film Wafer Level Encapsulated RF-MEMS Switch for D-Band Applications
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, B. Tillack, A. Mai, M. Kaynak
Proc. 46th European Microwave Conference (EuMC 2016), 1381 (2016)
(Nanotec)
This paper presents a wafer level packaged (WLP) RF-MEMS switch fabricated in a 0.13 μm SiGe BiCMOS process technology for D-Band (110-170 GHz) applications. For the wafer level packaging, thin film encapsulation approach is developed and used during the Back-End-of-Line (BEOL) fabrication process. The fabricated wafer level encapsulated (WLE) RF-MEMS switch provides a high capacitance Con/Coff ratio of 11.1. The fabricated WLE RF-MEMS switch shows beyond state of the art RF performances of better than 0.67 dB insertion loss and more than 16 dB isolation in all D-band. The measured maximum isolation of the WLE switch is 51.6 dB at 142.8 GHz with an insertion loss of 0.65 dB.

(128) D–Band RF–MEMS SPDT Switch in a 0.13 μm SiGe BiCMOS Technology
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, B. Tillack, M. Kaynak
IEEE Microwave and Wireless Components Letters 26(12), 1002 (2016)
(Nanotec)
This paper presents a D–Band (110–170 GHz) RF– MEMS based Single–Pole Double–Throw (SPDT) switch fabricated in a 0.13 μm SiGe BiCMOS technology. The on–wafer S–parameter measurements of the RF–MEMS based SPDT switch show beyond state of the art RF performances of 1.42 dB insertion loss and 54.5 dB isolation at 140 GHz. The SPDT switch consists of a tee junction connected to two Single–Pole Single–Throw (SPST) RF–MEMS switches. The RF–MEMS switch is actuated using 60 V actuation voltage and provides less than 10 μs switch–on and switch–off times. To the best of the authors’ knowledge, the results achieved in this study are the lowest insertion loss and the highest isolation of a SPDT reported in D– band.

(129) RF Pad Optimization for a 140 GHz RF-MEMS Switch
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, B. Tillack, M. Kaynak
Proc. International Symposium on RF MEMS and RF Microsystems (MEMSWAVE 2016), 16 (2016)

(Nanotec)

(130) SciFab - a Wafer-Level Heterointegrated InP DHBT/SiGe BiCMOS Foundry Process for mm-Wave Applications
N.G. Weimann, D. Stoppel, M.I. Schukfeh, M. Hossain, T. Al-Sawaf, B. Janke, R. Doerner, S. Sinha, F.-J.Schmückle, O. Krüger, V. Krozer, W. Heinrich, M. Lisker, A. Krüger, A. Datsuk, Ch. Meliani, B. Tillack
Physica Status Solidi A 213(4), 909 (2016)
(SciFab)
We present a wafer-level heterointegrated indium phosphide double heterobipolar transistor on silicon germanium bipolarcomplementary metal oxide semiconductor (InP DHBT on
SiGe BiCMOS) process which relies on adhesive wafer bonding. Subcircuits are co-designed in both technologies, SiGe BiCMOS and InP DHBT, with more than 300 GHz bandwidth
microstrip interconnects. The 250 nm SiGe HBTs offer cutoff frequencies around 200 GHz, the 800 nm InP DHBTs exceed 350 GHz. Heterointegrated signal sources are demonstrated
including a 328 GHz quadrupling source with −12 dBm RF output power. A common design kit for full InP DHBT/SiGe BiCMOS co-design was set up. The technology is being opened
to third-party customers through IHP’s multi-purpose wafer foundry interface.

(131) Photoluminescence From Ultrathin Ge-Rich Multiple Quantum Wells Observed up to Room Temperature: Experiments and Modeling
T. Wendav, I.A. Fischer, M. Virgilio, G. Capellini, F. Oliveira, M.F. Cerqueira, A. Benedetti, S. Chiussi, P. Zaumseil, B. Schwartz, K. Busch, J. Schulze
Physical Review B 94, 245304 (2016)
Employing a low-temperature growth mode, we fabricated ultrathin Si1−xGex /Si multiple quantum well structures with a well thickness of less than 1.5 nm and a Ge concentration above 60% directly on a Si substrate. We identified an unusual temperature-dependent blueshift of the photoluminescence (PL) and exceptionally low thermal quenching. We find that this behavior is related to the relative intensities of the no-phonon (NP) peak and a phonon-assisted replica that are the main contributors to the total PL signal. To investigate these aspects in more detail, we developed a strategy to calculate the PL spectrum employing a self-consistent multivalley effective mass model, in combination with second-order perturbation theory. Through our investigation, we find that while the phonon-assisted feature decreases with temperature, the NP feature shows a strong increase in the recombination rate. Besides leading to the observed robustness against thermal quenching, this causes the
observed blueshift of the total PL signal.

(132) 0.13 µm BiCMOS embedded On-Chip High-Voltage Charge Pump with Stacked BEOL Capacitors for RF-MEMS Applications
M. Wietstruck, W. Winkler, A. Göritz, S. Tolunay Wipf, Ch. Wipf, D. Schmidt, A. Mai, M. Kaynak
Proc. International Symposium on RF MEMS and RF Microsystems (MEMSWAVE 2016), 43 (2016)
(Nanotec)

(133) 0.13 µm BiCMOS embedded On-Chip High-Voltage Charge Pump with Stacked BEOL Capacitors for RF-MEMS Applications
M. Wietstruck, W. Winkler, A. Göritz, S. Tolunay Wipf, Ch. Wipf, D. Schmidt, A. Mai, M. Kaynak
Novel Technologies for Microwave and Millimeter Wave Devices and Circuits / ed. A. Müller, (Series in Micro and Nanoengineering ; 25) 52 (2017)
(Nanotec)

(134) Evaluation of LDMOS Transistors for 10 Gbps Switched Mode Applications and X–band Power Amplifier
Ch. Wipf, R. Sorge, J. Schmidt
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), 57 (2016)
(LDMOS)
Similar to Application for Release (ID 13116 Archive Number 2015/272)

In this article we report on the capability of integrated LDMOS transistors for power amplifiers in 10 gigabit per second (Gbps) communication systems, smart power systems and X–band power amplifiers. The switched mode properties of the amplifier were evaluated using a 10.3125 Gbps pseudo random bit error sequence (PRBS) signal. A test mask according
to the IEEE P802.3aq 10GBASE-LRM Ethernet standard was applied to evaluate the recorded eye diagram. No single hit was detected in the forbidden test mask regions after measuring 6
million data points. Load–pull measurements at 11 GHz show an operational gain of 16 dB, a maximum power added efficiency (PAE) of 30 % and a maximum drain efficiency (EFF) of 38 %. RF small signal scattering parameters of the LDMOS transistor were measured up to 67 GHz. A cutoff frequency of 27 GHz and a maximum oscillation frequency of 56 GHz were extracted. The investigated n–LDMOS transistor is modularly integrated in a 0.25 µm SiGe:C BiCMOS Technology.

(135) A Two-Dimensional Fiber Grating Coupler on SOI for Mode Division Multiplexing
B. Wohlfeil, G. Rademacher, Ch. Stamatiadis, K. Voigt, L. Zimmermann, K. Petermann
IEEE Photonics Technology Letters 28(11), 1241 (2016)
(SASER)
A grating-based approach to exciting higher order fiber modes in a few mode fibers is presented. By exploitation of higher order modes of silicon on insulator nanowaveguides and
by the illumination of the grating from opposing ends, the LP01, LP11,a, LP11,b, and LP21,a fiber modes could be excited in two orthogonal polarizations. Simulative and experimental results as a proof of principle are presented.

(136) C and Si Delta Doping in Ge by CH3SiH3 using Reduced Pressure Chemical Vapor Deposition
Y. Yamamoto, N. Ueno, M. Sakuraba, J. Murota, A. Mai, B. Tillack
Thin Solid Films 602, 24 (2016)
C and Si delta doping in Ge are investigated using a reduced pressure chemical vapor deposition system to establish atomic-order controlled processes. CH3SiH3 is exposed at 250 °C to 500 °C to a Ge on Si (100) substrate using H2 or N2 carrier gas followed by a Ge cap layer deposition. At 350 °C, C and Si are uniformly adsorbed on the Ge surface and the incorporated C and Si formsteep delta profiles belowdetection limit of SIMS measurement. By
usingN2 as carrier gas, the incorporated C and Si doses inGe are saturated at onemono-layer below350 °C. At this temperature range, the incorporated C and Si doses are nearly the same, indicating CH3SiH3 is adsorbed on the Ge surfacewithout decomposing the C\\Si bond. On the other hand, by using H2 as carrier gas, lower incorporated C is observed in comparison to Si. CH3SiH3 injected with H2 carrier gas is adsorbed on Gewithout decomposing the C\\Si bond and the adsorbed C is reduced by dissociation of the C\\Si bond during temperature ramp up to 550 °C. The adsorbed C is maintained on the Ge surface in N2 at 550 °C.

(137) Abrupt SiGe and Si Profile Fabrication by Introducing C Delta Layer
Y. Yamamoto, A. Hesse, P. Zaumseil, J. Murota, B. Tillack
ECS Transactions 75(8), 339 (2016)
High quality and steep Si / Si0.5Ge0.5 / Si profile is fabricated by introducing a C delta layer at the interface using reduced pressure chemical vapor deposition system. The Si0.5Ge0.5 and Si layers are deposited by H2-SiH4-GeH4 at 500°C and H2-Si2H6 at 500 °C to 575 °C, respectively. By introducing a C delta layer at the surface, roughening of the Si0.5Ge0.5 surface is maintained at 575 °C due to suppressed surface migration of Si and Ge as well as defect injection into the Si0.5Ge0.5 layer resulting in high crystallinity Si cap layer growth. Adsorbed CH3 species at the surface are preventing the epitaxial Si cap layer growth at 500 °C, but it is possible to deposit high quality epitaxial Si at higher temperature because of hydrogen-desorption from adsorbed CH3. Interdiffusion of Si and Ge at the interface is observed at 525 °C in the case of sample without C delta layers, but the interdiffusion is suppressed even at 575 °C by introducing C delta layers.

(138) Abrupt SiGe and Si Profile Fabrication by C Delta Layer
Y. Yamamoto, A. Hesse, P. Zaumseil, J. Murota, B. Tillack
Proc. ECS Meeting: SiGe, Ge and Related Compounds: Materials, Processing and Devices, abstr. (2016)

(139) Photoluminescence of Phosphorus Doped Ge on Si(100)
Y. Yamamoto, G. Capellini, N. Taoka, M. Montanari, P. Zaumseil, A. Hesse, T. Schroeder, B. Tillack
Proc. 8th International SiGe Technology and Device Meeting (ISTDM 2016), abstr., 69 (2016)

(140) Introduction of C Delta Layers for Steep SiGe / Si Profile Fabrication
Y. Yamamoto, A. Hesse, P. Zaumseil, J. Murota, B. Tillack
Proc. JSPS International Workshop Core-to-Core Program Atomically Controlled Processing for Ultra-large Scale Integration, (2016)

(141) High Temperature Reactive Ion Etching of Iridium Thin Films with Aluminum Mask in CF4/O2/Ar Plasma
C.-P. Yeh, M. Lisker, B. Kalkofen, E.P. Burte
AIP Advances 6, 085111 (2016)
Reactive ion etching (RIE) technology for iridium with CF4/O2/Ar gas mixtures and
aluminum mask at high temperatures up to 350 ◦C was developed. The influence of
various process parameters such as gas mixing ratio and substrate temperature on
the etch rate was studied in order to find optimal process conditions. The surface of
the samples after etching was found to be clean under SEM inspection. It was also
shown that the etch rate of iridium could be enhanced at higher process temperature
and, at the same time, very high etching selectivity between aluminum etching mask
and iridium could be achieved.

(142) Misfit Dislocation Free Epitaxial Growth of SiGe on Compliant Nano-Structured Silicon
P. Zaumseil, Y. Yamamoto, M.A. Schubert, G. Capellini, T. Schroeder
Solid State Phenomena 242, 402 (2016)
(Ge Nanoheteroepitaxy)
The integration of germanium (Ge) into silicon-based microelectronics technologies is
currently attracting increasing interest and research effort. One way to realize this without threading and misfit dislocations is the so-called nanoheteroepitaxy approach. We demonstrate that a modified Si nano-structure approach with nano-pillars or bars separated by TEOS SiO2 can be used successfully to deposit SiGe dots and lines free of misfit dislocations. It was found that strain relaxation in the pseudomorphically grown SiGe happens fully elastically. These studies are important for the understanding of the behavior of nano-structured Si for the final goal of Ge integration via SiGe buffer.

(143) S-Parameter Characterization and Lumped-Element Modelling of mm-Wave Single-Drift IMPATT Diode
W. Zhang, Y. Yamamoto, M. Oehme, K. Matthies, A. I. Raju, V. S. SenthilSrinivasan, R. Koerner, M. Gollhofer, S. Bechler H. Funk, B. Tillack, E. Kasper, J. Schulze
Japanese Journal of Applied Physics Pt. 1 55(4S), 04EF03 (2016)

(144) Monolithic Electronic-Photonic Co-Integration in Photonic BiCMOS
L. Zimmermann
Proc. European Conference on Optical Communications (ECOC 2016), 710 (2016)
(SPEED)
Monolithic co-integration of silicon photonics with high-performance BiCMOS is a new
technology for implementing efficient sub-systems in high-speed optical communications. Presentstatus of the technology will be reviewed; pros and cons in comparison to other integration technologies will be discussed.

The building and the infrastructure of the IHP were funded by the European Regional Development Fund of the European Union, funds of the Federal Government and also funds of the Federal State of Brandenburg.